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Commit ffcfdcc2 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge 5.4.63 into android11-5.4-lts



Changes in 5.4.63
	HID: core: Correctly handle ReportSize being zero
	HID: core: Sanitize event code and type when mapping input
	perf record/stat: Explicitly call out event modifiers in the documentation
	drm/sched: Fix passing zero to 'PTR_ERR' warning v2
	drm/etnaviv: fix TS cache flushing on GPUs with BLT engine
	KVM: arm64: Add kvm_extable for vaxorcism code
	KVM: arm64: Survive synchronous exceptions caused by AT instructions
	KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exception
	dt-bindings: mmc: tegra: Add tmclk for Tegra210 and later
	arm64: tegra: Add missing timeout clock to Tegra194 SDMMC nodes
	arm64: tegra: Add missing timeout clock to Tegra186 SDMMC nodes
	arm64: tegra: Add missing timeout clock to Tegra210 SDMMC
	sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra210
	sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra186
	scsi: target: tcmu: Fix size in calls to tcmu_flush_dcache_range
	scsi: target: tcmu: Optimize use of flush_dcache_page
	Linux 5.4.63

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Change-Id: I703abbc41e97cd1732a1fb3cf3f7d8e4b2a33766
parents 7ea7cc9f e32f4fa1
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+29 −3
Original line number Diff line number Diff line
@@ -15,8 +15,15 @@ Required properties:
  - "nvidia,tegra210-sdhci": for Tegra210
  - "nvidia,tegra186-sdhci": for Tegra186
  - "nvidia,tegra194-sdhci": for Tegra194
- clocks : Must contain one entry, for the module clock.
  See ../clocks/clock-bindings.txt for details.
- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
	  One for the module clock and one for the timeout clock.
	  For all other Tegra devices, must contain a single entry for
	  the module clock. See ../clocks/clock-bindings.txt for details.
- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
	       strings 'sdhci' and 'tmclk' to represent the module and
	       the timeout clocks, respectively.
	       For all other Tegra devices must contain the string 'sdhci'
	       to represent the module clock.
- resets : Must contain an entry for each entry in reset-names.
  See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
@@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194:

Example:
sdhci@700b0000 {
	compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
	compatible = "nvidia,tegra124-sdhci";
	reg = <0x0 0x700b0000 0x0 0x200>;
	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -115,3 +122,22 @@ sdhci@700b0000 {
	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
	status = "disabled";
};

sdhci@700b0000 {
	compatible = "nvidia,tegra210-sdhci";
	reg = <0x0 0x700b0000 0x0 0x200>;
	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
		 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	clock-names = "sdhci", "tmclk";
	resets = <&tegra_car 14>;
	reset-names = "sdhci";
	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
	pinctrl-0 = <&sdmmc1_3v3>;
	pinctrl-1 = <&sdmmc1_1v8>;
	nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
	nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
	nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
	status = "disabled";
};
+1 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 4
SUBLEVEL = 62
SUBLEVEL = 63
EXTRAVERSION =
NAME = Kleptomaniac Octopus

+12 −8
Original line number Diff line number Diff line
@@ -309,8 +309,9 @@
		compatible = "nvidia,tegra186-sdhci";
		reg = <0x0 0x03400000 0x0 0x10000>;
		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
		clock-names = "sdhci";
		clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
		clock-names = "sdhci", "tmclk";
		resets = <&bpmp TEGRA186_RESET_SDMMC1>;
		reset-names = "sdhci";
		iommus = <&smmu TEGRA186_SID_SDMMC1>;
@@ -335,8 +336,9 @@
		compatible = "nvidia,tegra186-sdhci";
		reg = <0x0 0x03420000 0x0 0x10000>;
		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
		clock-names = "sdhci";
		clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
		clock-names = "sdhci", "tmclk";
		resets = <&bpmp TEGRA186_RESET_SDMMC2>;
		reset-names = "sdhci";
		iommus = <&smmu TEGRA186_SID_SDMMC2>;
@@ -356,8 +358,9 @@
		compatible = "nvidia,tegra186-sdhci";
		reg = <0x0 0x03440000 0x0 0x10000>;
		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
		clock-names = "sdhci";
		clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
		clock-names = "sdhci", "tmclk";
		resets = <&bpmp TEGRA186_RESET_SDMMC3>;
		reset-names = "sdhci";
		iommus = <&smmu TEGRA186_SID_SDMMC3>;
@@ -379,8 +382,9 @@
		compatible = "nvidia,tegra186-sdhci";
		reg = <0x0 0x03460000 0x0 0x10000>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
		clock-names = "sdhci";
		clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
		clock-names = "sdhci", "tmclk";
		assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
				  <&bpmp TEGRA186_CLK_PLLC4_VCO>;
		assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
+9 −6
Original line number Diff line number Diff line
@@ -403,8 +403,9 @@
			compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
			reg = <0x03400000 0x10000>;
			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
			clock-names = "sdhci";
			clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
			clock-names = "sdhci", "tmclk";
			resets = <&bpmp TEGRA194_RESET_SDMMC1>;
			reset-names = "sdhci";
			nvidia,pad-autocal-pull-up-offset-3v3-timeout =
@@ -425,8 +426,9 @@
			compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
			reg = <0x03440000 0x10000>;
			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
			clock-names = "sdhci";
			clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
			clock-names = "sdhci", "tmclk";
			resets = <&bpmp TEGRA194_RESET_SDMMC3>;
			reset-names = "sdhci";
			nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
@@ -448,8 +450,9 @@
			compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
			reg = <0x03460000 0x10000>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
			clock-names = "sdhci";
			clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
			clock-names = "sdhci", "tmclk";
			assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
					  <&bpmp TEGRA194_CLK_PLLC4>;
			assigned-clock-parents =
+12 −8
Original line number Diff line number Diff line
@@ -1116,8 +1116,9 @@
		compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0000 0x0 0x200>;
		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
		clock-names = "sdhci";
		clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
		clock-names = "sdhci", "tmclk";
		resets = <&tegra_car 14>;
		reset-names = "sdhci";
		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
@@ -1144,8 +1145,9 @@
		compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0200 0x0 0x200>;
		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
		clock-names = "sdhci";
		clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
		clock-names = "sdhci", "tmclk";
		resets = <&tegra_car 9>;
		reset-names = "sdhci";
		pinctrl-names = "sdmmc-1v8-drv";
@@ -1161,8 +1163,9 @@
		compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0400 0x0 0x200>;
		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
		clock-names = "sdhci";
		clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
		clock-names = "sdhci", "tmclk";
		resets = <&tegra_car 69>;
		reset-names = "sdhci";
		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
@@ -1184,8 +1187,9 @@
		compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0600 0x0 0x200>;
		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
		clock-names = "sdhci";
		clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
		clock-names = "sdhci", "tmclk";
		resets = <&tegra_car 15>;
		reset-names = "sdhci";
		pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";
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