Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ff2beb1d authored by Balaji T K's avatar Balaji T K Committed by Tony Lindgren
Browse files

ARM: OMAP4: hsmmc: Fix Pbias configuration on regulator OFF 



MMC1 data line IO's are powered down in before set regulator function.
IO's should not be powered ON when regulator is OFF.
Keep the IO's in power pown mode after regulator OFF otherwise VMODE_ERROR
interrupt is generated due to mismatch in input (regulator)
voltage and MMC IO drive voltage.
Delete incorrect comments which are not applicable for OMAP4.

Signed-off-by: default avatarBalaji T K <balajitk@ti.com>
Signed-off-by: default avatarKishore Kadiyala <kishore.kadiyala@ti.com>
Reported-by: default avatarViswanath Puttagunta <vishp@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent ace90216

arch/arm/mach-omap2/hsmmc.c

+2 −12
Original line number Diff line number Diff line
@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot, 
	 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the

	 * card with Vcc regulator (from twl4030 or whatever).  OMAP has both

	 * 1.8V and 3.0V modes, controlled by the PBIAS register.

	 *

	 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which

	 * is most naturally TWL VSIM; those pins also use PBIAS.

	 *

	 * FIXME handle VMMC1A as needed ...

	 */

	reg = omap4_ctrl_pad_readl(control_pbias_offset);

	reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |

		OMAP4_MMC1_PWRDNZ_MASK);

		OMAP4_MMC1_PWRDNZ_MASK |

		OMAP4_MMC1_PBIASLITE_VMODE_MASK);

	omap4_ctrl_pad_writel(reg, control_pbias_offset);

}
@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, 
			reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);

			omap4_ctrl_pad_writel(reg, control_pbias_offset);

		}

	} else {

		reg = omap4_ctrl_pad_readl(control_pbias_offset);

		reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |

			OMAP4_MMC1_PWRDNZ_MASK |

			OMAP4_MMC1_PBIASLITE_VMODE_MASK);

		omap4_ctrl_pad_writel(reg, control_pbias_offset);

	}

}