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Commit fee6c614 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2018-01-11-1' of... 

Merge tag 'drm-intel-fixes-2018-01-11-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

Hopefully final drm/i915 fixes for v4.15:
- Fix a KASAN reported use after free
- Whitelist a register to avoid hangs
- GVT fixes

* tag 'drm-intel-fixes-2018-01-11-1' of git://anongit.freedesktop.org/drm/drm-intel:
  drm/i915: Don't adjust priority on an already signaled fence
  drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.
  drm/i915/gvt: Fix stack-out-of-bounds bug in cmd parser
  drm/i915/gvt: Clear the shadow page table entry after post-sync
parents 477d70b6 5005c851

drivers/gpu/drm/i915/gvt/cmd_parser.c

+2 −2
Original line number Diff line number Diff line
@@ -2777,12 +2777,12 @@ int intel_gvt_scan_and_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) 
}



static struct cmd_info *find_cmd_entry_any_ring(struct intel_gvt *gvt,

		unsigned int opcode, int rings)

		unsigned int opcode, unsigned long rings)

{

	struct cmd_info *info = NULL;

	unsigned int ring;



	for_each_set_bit(ring, (unsigned long *)&rings, I915_NUM_ENGINES) {

	for_each_set_bit(ring, &rings, I915_NUM_ENGINES) {

		info = find_cmd_entry(gvt, opcode, ring);

		if (info)

			break;

drivers/gpu/drm/i915/gvt/gtt.c

+4 −1
Original line number Diff line number Diff line
@@ -1359,12 +1359,15 @@ static int ppgtt_handle_guest_write_page_table_bytes(void *gp, 
			return ret;

	} else {

		if (!test_bit(index, spt->post_shadow_bitmap)) {

			int type = spt->shadow_page.type;



			ppgtt_get_shadow_entry(spt, &se, index);

			ret = ppgtt_handle_guest_entry_removal(gpt, &se, index);

			if (ret)

				return ret;

			ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);

			ppgtt_set_shadow_entry(spt, &se, index);

		}



		ppgtt_set_post_shadow(spt, index);

	}

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -467,7 +467,7 @@ static void __fence_set_priority(struct dma_fence *fence, int prio) 
	struct drm_i915_gem_request *rq;

	struct intel_engine_cs *engine;



	if (!dma_fence_is_i915(fence))

	if (dma_fence_is_signaled(fence) || !dma_fence_is_i915(fence))

		return;



	rq = to_request(fence);

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -7027,6 +7027,8 @@ enum { 
#define GEN9_SLICE_COMMON_ECO_CHICKEN0		_MMIO(0x7308)

#define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)



#define GEN9_SLICE_COMMON_ECO_CHICKEN1		_MMIO(0x731c)



#define GEN7_L3SQCREG1				_MMIO(0xB010)

#define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000

drivers/gpu/drm/i915/intel_engine_cs.c

+5 −0
Original line number Diff line number Diff line
@@ -1390,6 +1390,11 @@ static int glk_init_workarounds(struct intel_engine_cs *engine) 
	if (ret)

		return ret;



	/* WA #0862: Userspace has to set "Barrier Mode" to avoid hangs. */

	ret = wa_ring_whitelist_reg(engine, GEN9_SLICE_COMMON_ECO_CHICKEN1);

	if (ret)

		return ret;



	/* WaToEnableHwFixForPushConstHWBug:glk */

	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,

			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);