Commit fea29b19 authored Nov 20, 2020 by Harshitha Sai Neelati Committed by Gerrit - the friendly Code Review server Dec 08, 2020

msm: kgsl: Add apb_pclk to the clock list and increase KGSL_MAX_CLKS



KGSL needs to enable apb_pclk for QDSS register access.
Add apb_pclk to the clock list. Increment KGSL_MAX_CLKS
to support apb_pclk.

Change-Id: I017628ddda2b5807aab4d8970a4ceab2d9174f53
Signed-off-by: Harshitha Sai Neelati <hsaine@codeaurora.org>

parent fa889c3a

drivers/gpu/msm/kgsl_pwrctrl.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -39,6 +39,7 @@ static const char * const clocks[] = {
		"gmu_clk",
		"ahb_clk",
		"smmu_vote",
		"apb_pclk",
		};

		static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,

drivers/gpu/msm/kgsl_pwrctrl.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -17,7 +17,7 @@

		#define KGSL_PWR_ON 0xFFFF

		#define KGSL_MAX_CLKS 17
		#define KGSL_MAX_CLKS 18

		#define KGSL_MAX_PWRLEVELS 16