Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fe7314a5 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "arm64: defconfig: Enable PDC irqchip, cmd_db and rpmh drivers"

parents 3af6ed88 edfbd7af
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -8,3 +8,6 @@ CONFIG_REGULATOR_REFGEN=m
CONFIG_REGULATOR_RPMH=m
CONFIG_REGULATOR_STUB=m
CONFIG_PINCTRL_DIREWOLF=m
CONFIG_QCOM_PDC=m
CONFIG_QCOM_COMMAND_DB=m
CONFIG_QCOM_RPMH=m
+2 −0
Original line number Diff line number Diff line
@@ -552,6 +552,7 @@ static int qcom_pdc_probe(struct platform_device *pdev)

static const struct of_device_id qcom_pdc_match_table[] = {
	{ .compatible = "qcom,lahaina-pdc" },
	{ .compatible = "qcom,direwolf-pdc"},
	{ .compatible = "qcom,shima-pdc" },
	{ .compatible = "qcom,sm8150-pdc" },
	{ .compatible = "qcom,sm6150-pdc" },
@@ -571,6 +572,7 @@ module_platform_driver(qcom_pdc_driver);
#else
IRQCHIP_DECLARE(qcom_pdc, "qcom,pdc", qcom_pdc_init);
IRQCHIP_DECLARE(pdc_lahaina, "qcom,lahaina-pdc", qcom_pdc_init);
IRQCHIP_DECLARE(pdc_direwolf, "qcom,direwolf-pdc", qcom_pdc_init);
IRQCHIP_DECLARE(pdc_shima, "qcom,shima-pdc", qcom_pdc_init);
IRQCHIP_DECLARE(pdc_sm6150, "qcom,sm6150-pdc", qcom_pdc_init);
IRQCHIP_DECLARE(pdc_sm8150, "qcom,sm8150-pdc", qcom_pdc_init);
+27 −1
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
 */

#include <linux/module.h>
@@ -2284,6 +2284,30 @@ static const struct msm_pingroup direwolf_groups[] = {
	[231] = SDC_QDSD_PINGROUP(sdc2_data, 0x1e8000, 9, 0),
};

static const struct msm_gpio_wakeirq_map direwolf_pdc_map[] = {
	{ 3, 245 }, { 4, 263 }, { 7, 254 }, { 21, 220 }, { 25, 244 },
	{ 26, 211 }, { 27, 172 }, { 29, 203 }, { 30, 169 }, { 31, 180 },
	{ 32, 181 }, { 33, 182 }, { 36, 206 }, { 39, 246 }, { 40, 183 },
	{ 42, 179 }, { 46, 247 }, { 53, 248 }, { 54, 190 }, { 55, 249 },
	{ 56, 250 }, { 58, 251 }, { 59, 207 }, { 62, 252 }, { 63, 191 },
	{ 64, 192 }, { 65, 193 }, { 69, 253 }, { 73, 255 }, { 84, 256 },
	{ 85, 208 }, { 90, 257 }, { 102, 214 }, { 103, 215 }, { 104, 216 },
	{ 107, 217 }, { 110, 218 }, { 124, 224 }, { 125, 189 },
	{ 126, 200 }, { 127, 225 }, { 128, 262 }, { 129, 201 },
	{ 130, 209 }, { 131, 173 }, { 132, 202 }, { 136, 210 },
	{ 138, 171 }, { 139, 226 }, { 140, 227 }, { 142, 228 },
	{ 144, 229 }, { 145, 230 }, { 146, 231 }, { 148, 232 },
	{ 149, 233 }, { 150, 234 }, { 152, 235 }, { 154, 212 },
	{ 157, 213 }, { 161, 219 }, { 170, 236 }, { 171, 221 },
	{ 174, 222 }, { 175, 237 }, { 176, 223 }, { 177, 170 },
	{ 180, 238 }, { 181, 239 }, { 182, 240 }, { 183, 241 },
	{ 184, 242 }, { 185, 243 }, { 190, 178 }, { 193, 184 },
	{ 196, 185 }, { 198, 186 }, { 200, 174 }, { 201, 175 },
	{ 205, 176 }, { 206, 177 }, { 208, 187 }, { 210, 198 },
	{ 211, 199 }, { 212, 204 }, { 215, 205 }, { 220, 188 },
	{ 221, 194 }, { 223, 195 }, { 225, 196 }, { 227, 197 },
};

static const struct msm_pinctrl_soc_data direwolf_pinctrl = {
	.pins = direwolf_pins,
	.npins = ARRAY_SIZE(direwolf_pins),
@@ -2292,6 +2316,8 @@ static const struct msm_pinctrl_soc_data direwolf_pinctrl = {
	.groups = direwolf_groups,
	.ngroups = ARRAY_SIZE(direwolf_groups),
	.ngpios = 229,
	.wakeirq_map = direwolf_pdc_map,
	.nwakeirq_map = ARRAY_SIZE(direwolf_pdc_map),
};

static int direwolf_pinctrl_probe(struct platform_device *pdev)