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Commit fe6ba88b authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Torvalds
Browse files

arch: replace _BITUL() in kernel-space headers with BIT() 

Now that BIT() can be used from assembly code, we can safely replace
_BITUL() with equivalent BIT().

UAPI headers are still required to use _BITUL(), but there is no more
reason to use it in kernel headers.  BIT() is shorter.

Link: http://lkml.kernel.org/r/20190609153941.17249-2-yamada.masahiro@socionext.com


Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 95b980d6

arch/arc/include/asm/pgtable.h

+4 −4
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
#ifndef _ASM_ARC_PGTABLE_H

#define _ASM_ARC_PGTABLE_H



#include <linux/const.h>

#include <linux/bits.h>

#define __ARCH_USE_5LEVEL_HACK

#include <asm-generic/pgtable-nopmd.h>

#include <asm/page.h>
@@ -215,11 +215,11 @@ 
#define BITS_FOR_PTE	(PGDIR_SHIFT - PAGE_SHIFT)

#define BITS_FOR_PGD	(32 - PGDIR_SHIFT)



#define PGDIR_SIZE	_BITUL(PGDIR_SHIFT)	/* vaddr span, not PDG sz */

#define PGDIR_SIZE	BIT(PGDIR_SHIFT)	/* vaddr span, not PDG sz */

#define PGDIR_MASK	(~(PGDIR_SIZE-1))



#define	PTRS_PER_PTE	_BITUL(BITS_FOR_PTE)

#define	PTRS_PER_PGD	_BITUL(BITS_FOR_PGD)

#define	PTRS_PER_PTE	BIT(BITS_FOR_PTE)

#define	PTRS_PER_PGD	BIT(BITS_FOR_PGD)



/*

 * Number of entries a user land program use.

arch/arc/plat-eznps/include/plat/ctop.h

+8 −7
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#error "Incorrect ctop.h include"

#endif



#include <linux/bits.h>

#include <linux/types.h>

#include <soc/nps/common.h>
@@ -51,19 +52,19 @@ 
#define CTOP_INST_AXOR_DI_R2_R2_R3		0x4A664C06



/* Do not use D$ for address in 2G-3G */

#define HW_COMPLY_KRN_NOT_D_CACHED		_BITUL(28)

#define HW_COMPLY_KRN_NOT_D_CACHED		BIT(28)



#define NPS_MSU_EN_CFG				0x80

#define NPS_CRG_BLKID				0x480

#define NPS_CRG_SYNC_BIT			_BITUL(0)

#define NPS_CRG_SYNC_BIT			BIT(0)

#define NPS_GIM_BLKID				0x5C0



/* GIM registers and fields*/

#define NPS_GIM_UART_LINE			_BITUL(7)

#define NPS_GIM_DBG_LAN_EAST_TX_DONE_LINE	_BITUL(10)

#define NPS_GIM_DBG_LAN_EAST_RX_RDY_LINE	_BITUL(11)

#define NPS_GIM_DBG_LAN_WEST_TX_DONE_LINE	_BITUL(25)

#define NPS_GIM_DBG_LAN_WEST_RX_RDY_LINE	_BITUL(26)

#define NPS_GIM_UART_LINE			BIT(7)

#define NPS_GIM_DBG_LAN_EAST_TX_DONE_LINE	BIT(10)

#define NPS_GIM_DBG_LAN_EAST_RX_RDY_LINE	BIT(11)

#define NPS_GIM_DBG_LAN_WEST_TX_DONE_LINE	BIT(25)

#define NPS_GIM_DBG_LAN_WEST_RX_RDY_LINE	BIT(26)



#ifndef __ASSEMBLY__

/* Functional registers definition */

arch/arm64/include/asm/sysreg.h

+41 −41
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
#ifndef __ASM_SYSREG_H

#define __ASM_SYSREG_H



#include <linux/const.h>

#include <linux/bits.h>

#include <linux/stringify.h>



/*
@@ -478,31 +478,31 @@ 
#define SYS_CNTV_CVAL_EL02		sys_reg(3, 5, 14, 3, 2)



/* Common SCTLR_ELx flags. */

#define SCTLR_ELx_DSSBS	(_BITUL(44))

#define SCTLR_ELx_ENIA	(_BITUL(31))

#define SCTLR_ELx_ENIB	(_BITUL(30))

#define SCTLR_ELx_ENDA	(_BITUL(27))

#define SCTLR_ELx_EE    (_BITUL(25))

#define SCTLR_ELx_IESB	(_BITUL(21))

#define SCTLR_ELx_WXN	(_BITUL(19))

#define SCTLR_ELx_ENDB	(_BITUL(13))

#define SCTLR_ELx_I	(_BITUL(12))

#define SCTLR_ELx_SA	(_BITUL(3))

#define SCTLR_ELx_C	(_BITUL(2))

#define SCTLR_ELx_A	(_BITUL(1))

#define SCTLR_ELx_M	(_BITUL(0))

#define SCTLR_ELx_DSSBS	(BIT(44))

#define SCTLR_ELx_ENIA	(BIT(31))

#define SCTLR_ELx_ENIB	(BIT(30))

#define SCTLR_ELx_ENDA	(BIT(27))

#define SCTLR_ELx_EE    (BIT(25))

#define SCTLR_ELx_IESB	(BIT(21))

#define SCTLR_ELx_WXN	(BIT(19))

#define SCTLR_ELx_ENDB	(BIT(13))

#define SCTLR_ELx_I	(BIT(12))

#define SCTLR_ELx_SA	(BIT(3))

#define SCTLR_ELx_C	(BIT(2))

#define SCTLR_ELx_A	(BIT(1))

#define SCTLR_ELx_M	(BIT(0))



#define SCTLR_ELx_FLAGS	(SCTLR_ELx_M  | SCTLR_ELx_A | SCTLR_ELx_C | \

			 SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_IESB)



/* SCTLR_EL2 specific flags. */

#define SCTLR_EL2_RES1	((_BITUL(4))  | (_BITUL(5))  | (_BITUL(11)) | (_BITUL(16)) | \

			 (_BITUL(18)) | (_BITUL(22)) | (_BITUL(23)) | (_BITUL(28)) | \

			 (_BITUL(29)))

#define SCTLR_EL2_RES0	((_BITUL(6))  | (_BITUL(7))  | (_BITUL(8))  | (_BITUL(9))  | \

			 (_BITUL(10)) | (_BITUL(13)) | (_BITUL(14)) | (_BITUL(15)) | \

			 (_BITUL(17)) | (_BITUL(20)) | (_BITUL(24)) | (_BITUL(26)) | \

			 (_BITUL(27)) | (_BITUL(30)) | (_BITUL(31)) | \

#define SCTLR_EL2_RES1	((BIT(4))  | (BIT(5))  | (BIT(11)) | (BIT(16)) | \

			 (BIT(18)) | (BIT(22)) | (BIT(23)) | (BIT(28)) | \

			 (BIT(29)))

#define SCTLR_EL2_RES0	((BIT(6))  | (BIT(7))  | (BIT(8))  | (BIT(9))  | \

			 (BIT(10)) | (BIT(13)) | (BIT(14)) | (BIT(15)) | \

			 (BIT(17)) | (BIT(20)) | (BIT(24)) | (BIT(26)) | \

			 (BIT(27)) | (BIT(30)) | (BIT(31)) | \

			 (0xffffefffUL << 32))



#ifdef CONFIG_CPU_BIG_ENDIAN
@@ -524,23 +524,23 @@ 
#endif



/* SCTLR_EL1 specific flags. */

#define SCTLR_EL1_UCI		(_BITUL(26))

#define SCTLR_EL1_E0E		(_BITUL(24))

#define SCTLR_EL1_SPAN		(_BITUL(23))

#define SCTLR_EL1_NTWE		(_BITUL(18))

#define SCTLR_EL1_NTWI		(_BITUL(16))

#define SCTLR_EL1_UCT		(_BITUL(15))

#define SCTLR_EL1_DZE		(_BITUL(14))

#define SCTLR_EL1_UMA		(_BITUL(9))

#define SCTLR_EL1_SED		(_BITUL(8))

#define SCTLR_EL1_ITD		(_BITUL(7))

#define SCTLR_EL1_CP15BEN	(_BITUL(5))

#define SCTLR_EL1_SA0		(_BITUL(4))



#define SCTLR_EL1_RES1	((_BITUL(11)) | (_BITUL(20)) | (_BITUL(22)) | (_BITUL(28)) | \

			 (_BITUL(29)))

#define SCTLR_EL1_RES0  ((_BITUL(6))  | (_BITUL(10)) | (_BITUL(13)) | (_BITUL(17)) | \

			 (_BITUL(27)) | (_BITUL(30)) | (_BITUL(31)) | \

#define SCTLR_EL1_UCI		(BIT(26))

#define SCTLR_EL1_E0E		(BIT(24))

#define SCTLR_EL1_SPAN		(BIT(23))

#define SCTLR_EL1_NTWE		(BIT(18))

#define SCTLR_EL1_NTWI		(BIT(16))

#define SCTLR_EL1_UCT		(BIT(15))

#define SCTLR_EL1_DZE		(BIT(14))

#define SCTLR_EL1_UMA		(BIT(9))

#define SCTLR_EL1_SED		(BIT(8))

#define SCTLR_EL1_ITD		(BIT(7))

#define SCTLR_EL1_CP15BEN	(BIT(5))

#define SCTLR_EL1_SA0		(BIT(4))



#define SCTLR_EL1_RES1	((BIT(11)) | (BIT(20)) | (BIT(22)) | (BIT(28)) | \

			 (BIT(29)))

#define SCTLR_EL1_RES0  ((BIT(6))  | (BIT(10)) | (BIT(13)) | (BIT(17)) | \

			 (BIT(27)) | (BIT(30)) | (BIT(31)) | \

			 (0xffffefffUL << 32))



#ifdef CONFIG_CPU_BIG_ENDIAN
@@ -756,13 +756,13 @@ 
#define ZCR_ELx_LEN_SIZE	9

#define ZCR_ELx_LEN_MASK	0x1ff



#define CPACR_EL1_ZEN_EL1EN	(_BITUL(16)) /* enable EL1 access */

#define CPACR_EL1_ZEN_EL0EN	(_BITUL(17)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_ZEN_EL1EN	(BIT(16)) /* enable EL1 access */

#define CPACR_EL1_ZEN_EL0EN	(BIT(17)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_ZEN		(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)





/* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */

#define SYS_MPIDR_SAFE_VAL	(_BITUL(31))

#define SYS_MPIDR_SAFE_VAL	(BIT(31))



#ifdef __ASSEMBLY__

arch/s390/include/asm/ctl_reg.h

+21 −21
Original line number Diff line number Diff line
@@ -8,27 +8,27 @@ 
#ifndef __ASM_CTL_REG_H

#define __ASM_CTL_REG_H



#include <linux/const.h>



#define CR0_CLOCK_COMPARATOR_SIGN	_BITUL(63 - 10)

#define CR0_EMERGENCY_SIGNAL_SUBMASK	_BITUL(63 - 49)

#define CR0_EXTERNAL_CALL_SUBMASK	_BITUL(63 - 50)

#define CR0_CLOCK_COMPARATOR_SUBMASK	_BITUL(63 - 52)

#define CR0_CPU_TIMER_SUBMASK		_BITUL(63 - 53)

#define CR0_SERVICE_SIGNAL_SUBMASK	_BITUL(63 - 54)

#define CR0_UNUSED_56			_BITUL(63 - 56)

#define CR0_INTERRUPT_KEY_SUBMASK	_BITUL(63 - 57)

#define CR0_MEASUREMENT_ALERT_SUBMASK	_BITUL(63 - 58)



#define CR2_GUARDED_STORAGE		_BITUL(63 - 59)



#define CR14_UNUSED_32			_BITUL(63 - 32)

#define CR14_UNUSED_33			_BITUL(63 - 33)

#define CR14_CHANNEL_REPORT_SUBMASK	_BITUL(63 - 35)

#define CR14_RECOVERY_SUBMASK		_BITUL(63 - 36)

#define CR14_DEGRADATION_SUBMASK	_BITUL(63 - 37)

#define CR14_EXTERNAL_DAMAGE_SUBMASK	_BITUL(63 - 38)

#define CR14_WARNING_SUBMASK		_BITUL(63 - 39)

#include <linux/bits.h>



#define CR0_CLOCK_COMPARATOR_SIGN	BIT(63 - 10)

#define CR0_EMERGENCY_SIGNAL_SUBMASK	BIT(63 - 49)

#define CR0_EXTERNAL_CALL_SUBMASK	BIT(63 - 50)

#define CR0_CLOCK_COMPARATOR_SUBMASK	BIT(63 - 52)

#define CR0_CPU_TIMER_SUBMASK		BIT(63 - 53)

#define CR0_SERVICE_SIGNAL_SUBMASK	BIT(63 - 54)

#define CR0_UNUSED_56			BIT(63 - 56)

#define CR0_INTERRUPT_KEY_SUBMASK	BIT(63 - 57)

#define CR0_MEASUREMENT_ALERT_SUBMASK	BIT(63 - 58)



#define CR2_GUARDED_STORAGE		BIT(63 - 59)



#define CR14_UNUSED_32			BIT(63 - 32)

#define CR14_UNUSED_33			BIT(63 - 33)

#define CR14_CHANNEL_REPORT_SUBMASK	BIT(63 - 35)

#define CR14_RECOVERY_SUBMASK		BIT(63 - 36)

#define CR14_DEGRADATION_SUBMASK	BIT(63 - 37)

#define CR14_EXTERNAL_DAMAGE_SUBMASK	BIT(63 - 38)

#define CR14_WARNING_SUBMASK		BIT(63 - 39)



#ifndef __ASSEMBLY__

arch/s390/include/asm/nmi.h

+10 −10
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
#ifndef _ASM_S390_NMI_H

#define _ASM_S390_NMI_H



#include <linux/const.h>

#include <linux/bits.h>

#include <linux/types.h>



#define MCIC_SUBCLASS_MASK	(1ULL<<63 | 1ULL<<62 | 1ULL<<61 | \
@@ -20,15 +20,15 @@ 
				1ULL<<55 | 1ULL<<54 | 1ULL<<53 | \

				1ULL<<52 | 1ULL<<47 | 1ULL<<46 | \

				1ULL<<45 | 1ULL<<44)

#define MCCK_CODE_SYSTEM_DAMAGE		_BITUL(63)

#define MCCK_CODE_EXT_DAMAGE		_BITUL(63 - 5)

#define MCCK_CODE_CP			_BITUL(63 - 9)

#define MCCK_CODE_CPU_TIMER_VALID	_BITUL(63 - 46)

#define MCCK_CODE_PSW_MWP_VALID		_BITUL(63 - 20)

#define MCCK_CODE_PSW_IA_VALID		_BITUL(63 - 23)

#define MCCK_CODE_CR_VALID		_BITUL(63 - 29)

#define MCCK_CODE_GS_VALID		_BITUL(63 - 36)

#define MCCK_CODE_FC_VALID		_BITUL(63 - 43)

#define MCCK_CODE_SYSTEM_DAMAGE		BIT(63)

#define MCCK_CODE_EXT_DAMAGE		BIT(63 - 5)

#define MCCK_CODE_CP			BIT(63 - 9)

#define MCCK_CODE_CPU_TIMER_VALID	BIT(63 - 46)

#define MCCK_CODE_PSW_MWP_VALID		BIT(63 - 20)

#define MCCK_CODE_PSW_IA_VALID		BIT(63 - 23)

#define MCCK_CODE_CR_VALID		BIT(63 - 29)

#define MCCK_CODE_GS_VALID		BIT(63 - 36)

#define MCCK_CODE_FC_VALID		BIT(63 - 43)



#ifndef __ASSEMBLY__