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Commit fcfec1fc authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915/icl: fix step numbers in icl_display_core_init() 



At some point the spec was changed and we never updated the numbers to
match it. Let's try once more to keep them in sync.

Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190404230426.15837-2-lucas.demarchi@intel.com
parent 0fc2273b

drivers/gpu/drm/i915/intel_runtime_pm.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -3839,11 +3839,11 @@ void icl_display_core_init(struct drm_i915_private *dev_priv, 
	/* 1. Enable PCH reset handshake. */

	/* 1. Enable PCH reset handshake. */

	intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv));

	intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv));





	/* 2-3. */

	/* 2. Initialize all combo phys */

	icl_combo_phys_init(dev_priv);

	icl_combo_phys_init(dev_priv);





	/*

	/*

	 * 4. Enable Power Well 1 (PG1).

	 * 3. Enable Power Well 1 (PG1).

	 *    The AUX IO power wells will be enabled on demand.

	 *    The AUX IO power wells will be enabled on demand.

	 */

	 */

	mutex_lock(&power_domains->lock);

	mutex_lock(&power_domains->lock);
@@ -3851,13 +3851,13 @@ void icl_display_core_init(struct drm_i915_private *dev_priv, 
	intel_power_well_enable(dev_priv, well);

	intel_power_well_enable(dev_priv, well);

	mutex_unlock(&power_domains->lock);

	mutex_unlock(&power_domains->lock);





	/* 5. Enable CDCLK. */

	/* 4. Enable CDCLK. */

	intel_cdclk_init(dev_priv);

	intel_cdclk_init(dev_priv);





	/* 6. Enable DBUF. */

	/* 5. Enable DBUF. */

	icl_dbuf_enable(dev_priv);

	icl_dbuf_enable(dev_priv);





	/* 7. Setup MBUS. */

	/* 6. Setup MBUS. */

	icl_mbus_init(dev_priv);

	icl_mbus_init(dev_priv);





	if (resume && dev_priv->csr.dmc_payload)

	if (resume && dev_priv->csr.dmc_payload)