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Commit fccf231a authored by Songjun Wu's avatar Songjun Wu Committed by Greg Kroah-Hartman
Browse files

serial: lantiq: Change ltq_w32_mask to asc_update_bits 



ltq prefix is platform specific function, asc prefix
is more generic.

Signed-off-by: default avatarSongjun Wu <songjun.wu@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b871424f

drivers/tty/serial/lantiq.c

+20 −13
Original line number Diff line number Diff line
@@ -113,6 +113,13 @@ struct ltq_uart_port { 
	unsigned int		err_irq;

};



static inline void asc_update_bits(u32 clear, u32 set, void __iomem *reg)

{

	u32 tmp = readl(reg);



	writel((tmp & ~clear) | set, reg);

}



static inline struct

ltq_uart_port *to_ltq_uart_port(struct uart_port *port)

{
@@ -163,16 +170,16 @@ lqasc_rx_chars(struct uart_port *port) 
		if (rsr & ASCSTATE_ANY) {

			if (rsr & ASCSTATE_PE) {

				port->icount.parity++;

				ltq_w32_mask(0, ASCWHBSTATE_CLRPE,

				asc_update_bits(0, ASCWHBSTATE_CLRPE,

					port->membase + LTQ_ASC_WHBSTATE);

			} else if (rsr & ASCSTATE_FE) {

				port->icount.frame++;

				ltq_w32_mask(0, ASCWHBSTATE_CLRFE,

				asc_update_bits(0, ASCWHBSTATE_CLRFE,

					port->membase + LTQ_ASC_WHBSTATE);

			}

			if (rsr & ASCSTATE_ROE) {

				port->icount.overrun++;

				ltq_w32_mask(0, ASCWHBSTATE_CLRROE,

				asc_update_bits(0, ASCWHBSTATE_CLRROE,

					port->membase + LTQ_ASC_WHBSTATE);

			}
@@ -252,7 +259,7 @@ lqasc_err_int(int irq, void *_port) 
	struct uart_port *port = (struct uart_port *)_port;

	spin_lock_irqsave(&ltq_asc_lock, flags);

	/* clear any pending interrupts */

	ltq_w32_mask(0, ASCWHBSTATE_CLRPE | ASCWHBSTATE_CLRFE |

	asc_update_bits(0, ASCWHBSTATE_CLRPE | ASCWHBSTATE_CLRFE |

		ASCWHBSTATE_CLRROE, port->membase + LTQ_ASC_WHBSTATE);

	spin_unlock_irqrestore(&ltq_asc_lock, flags);

	return IRQ_HANDLED;
@@ -304,7 +311,7 @@ lqasc_startup(struct uart_port *port) 
		clk_enable(ltq_port->clk);

	port->uartclk = clk_get_rate(ltq_port->fpiclk);



	ltq_w32_mask(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET),

	asc_update_bits(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET),

		port->membase + LTQ_ASC_CLC);



	ltq_w32(0, port->membase + LTQ_ASC_PISEL);
@@ -320,7 +327,7 @@ lqasc_startup(struct uart_port *port) 
	 * setting enable bits

	 */

	wmb();

	ltq_w32_mask(0, ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN |

	asc_update_bits(0, ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN |

		ASCCON_ROEN, port->membase + LTQ_ASC_CON);



	retval = request_irq(ltq_port->tx_irq, lqasc_tx_int,
@@ -364,9 +371,9 @@ lqasc_shutdown(struct uart_port *port) 
	free_irq(ltq_port->err_irq, port);



	ltq_w32(0, port->membase + LTQ_ASC_CON);

	ltq_w32_mask(ASCRXFCON_RXFEN, ASCRXFCON_RXFFLU,

	asc_update_bits(ASCRXFCON_RXFEN, ASCRXFCON_RXFFLU,

		port->membase + LTQ_ASC_RXFCON);

	ltq_w32_mask(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU,

	asc_update_bits(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU,

		port->membase + LTQ_ASC_TXFCON);

	if (!IS_ERR(ltq_port->clk))

		clk_disable(ltq_port->clk);
@@ -438,7 +445,7 @@ lqasc_set_termios(struct uart_port *port, 
	spin_lock_irqsave(&ltq_asc_lock, flags);



	/* set up CON */

	ltq_w32_mask(0, con, port->membase + LTQ_ASC_CON);

	asc_update_bits(0, con, port->membase + LTQ_ASC_CON);



	/* Set baud rate - take a divider of 2 into account */

	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
@@ -446,19 +453,19 @@ lqasc_set_termios(struct uart_port *port, 
	divisor = divisor / 2 - 1;



	/* disable the baudrate generator */

	ltq_w32_mask(ASCCON_R, 0, port->membase + LTQ_ASC_CON);

	asc_update_bits(ASCCON_R, 0, port->membase + LTQ_ASC_CON);



	/* make sure the fractional divider is off */

	ltq_w32_mask(ASCCON_FDE, 0, port->membase + LTQ_ASC_CON);

	asc_update_bits(ASCCON_FDE, 0, port->membase + LTQ_ASC_CON);



	/* set up to use divisor of 2 */

	ltq_w32_mask(ASCCON_BRS, 0, port->membase + LTQ_ASC_CON);

	asc_update_bits(ASCCON_BRS, 0, port->membase + LTQ_ASC_CON);



	/* now we can write the new baudrate into the register */

	ltq_w32(divisor, port->membase + LTQ_ASC_BG);



	/* turn the baudrate generator back on */

	ltq_w32_mask(0, ASCCON_R, port->membase + LTQ_ASC_CON);

	asc_update_bits(0, ASCCON_R, port->membase + LTQ_ASC_CON);



	/* enable rx */

	ltq_w32(ASCWHBSTATE_SETREN, port->membase + LTQ_ASC_WHBSTATE);