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Commit fc2bb8d1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'i2c-embedded/for-3.4' of git://git.pengutronix.de/git/wsa/linux

Pull i2c embedded updates from Wolfram Sang:
 "Nothing special from i2c-embedded for this merge window.  Two new
  drivers, minor feature additions, bugfixes, cleanups.

  All patches have been in linux-next for some time, too."

* 'i2c-embedded/for-3.4' of git://git.pengutronix.de/git/wsa/linux:
  i2c-eg20t: Remove write-only variables
  i2c-eg20t: Rework pch_i2c_wait_for_bus_idle to reduce wait time
  i2c-s3c2410: Add stub runtime power management
  i2c-s3c2410: Convert to devm_kzalloc()
  i2c: add CSR SiRFprimaII on-chip I2C controllers driver
  i2c: tegra: Remove unnecessary write to INT_STATUS
  i2c: imx: fix imx driver to work though signal is pending
  i2c: designware: dw_i2c_init_driver as subsys initcall
  misc: at24: describe platform_data with kernel_doc
  i2c: Move I2C_EG20T option to the right place.
  i2c: Support for Netlogic XLR/XLS I2C controller.
  i2c: mpc: Add support for SMBUS_READ_BLOCK_DATA
  i2c: versatile: Add Device Tree support
parents 475c77ed bbceeee8
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+19 −0
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I2C for SiRFprimaII platforms

Required properties :
- compatible : Must be "sirf,prima2-i2c"
- reg: physical base address of the controller and length of memory mapped
     region.
- interrupts: interrupt number to the cpu.

Optional properties:
- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
  The absence of the propoerty indicates the default frequency 100 kHz.

Examples :

i2c0: i2c@b00e0000 {
    compatible = "sirf,prima2-i2c";
    reg = <0xb00e0000 0x10000>;
    interrupts = <24>;
};
+32 −12
Original line number Diff line number Diff line
@@ -369,6 +369,21 @@ config I2C_DESIGNWARE_PCI
	  This driver can also be built as a module.  If so, the module
	  will be called i2c-designware-pci.

config I2C_EG20T
	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C"
	depends on PCI
	help
	  This driver is for PCH(Platform controller Hub) I2C of EG20T which
	  is an IOH(Input/Output Hub) for x86 embedded processor.
	  This driver can access PCH I2C bus device.

	  This driver also can be used for LAPIS Semiconductor IOH(Input/
	  Output Hub), ML7213, ML7223 and ML7831.
	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.

config I2C_GPIO
	tristate "GPIO-based bitbanging I2C"
	depends on GENERIC_GPIO
@@ -630,6 +645,16 @@ config I2C_SIMTEC
	  This driver can also be built as a module. If so, the module
	  will be called i2c-simtec.

config I2C_SIRF
	tristate "CSR SiRFprimaII I2C interface"
	depends on ARCH_PRIMA2
	help
	  If you say yes to this option, support will be included for the
	  CSR SiRFprimaII I2C interface.

	  This driver can also be built as a module.  If so, the module
	  will be called i2c-sirf.

config I2C_STU300
	tristate "ST Microelectronics DDC I2C interface"
	depends on MACH_U300
@@ -681,20 +706,15 @@ config I2C_XILINX
	  This driver can also be built as a module.  If so, the module
	  will be called xilinx_i2c.

config I2C_EG20T
	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C"
	depends on PCI
config I2C_XLR
	tristate "XLR I2C support"
	depends on CPU_XLR
	help
	  This driver is for PCH(Platform controller Hub) I2C of EG20T which
	  is an IOH(Input/Output Hub) for x86 embedded processor.
	  This driver can access PCH I2C bus device.
	  This driver enables support for the on-chip I2C interface of
	  the Netlogic XLR/XLS MIPS processors.

	  This driver also can be used for LAPIS Semiconductor IOH(Input/
	  Output Hub), ML7213, ML7223 and ML7831.
	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
	  This driver can also be built as a module.  If so, the module
	  will be called i2c-xlr.

comment "External I2C/SMBus adapter drivers"

+3 −1
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o
i2c-designware-platform-objs := i2c-designware-platdrv.o i2c-designware-core.o
obj-$(CONFIG_I2C_DESIGNWARE_PCI)	+= i2c-designware-pci.o
i2c-designware-pci-objs := i2c-designware-pcidrv.o i2c-designware-core.o
obj-$(CONFIG_I2C_EG20T)		+= i2c-eg20t.o
obj-$(CONFIG_I2C_GPIO)		+= i2c-gpio.o
obj-$(CONFIG_I2C_HIGHLANDER)	+= i2c-highlander.o
obj-$(CONFIG_I2C_IBM_IIC)	+= i2c-ibm_iic.o
@@ -63,12 +64,13 @@ obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
obj-$(CONFIG_I2C_SH7760)	+= i2c-sh7760.o
obj-$(CONFIG_I2C_SH_MOBILE)	+= i2c-sh_mobile.o
obj-$(CONFIG_I2C_SIMTEC)	+= i2c-simtec.o
obj-$(CONFIG_I2C_SIRF)		+= i2c-sirf.o
obj-$(CONFIG_I2C_STU300)	+= i2c-stu300.o
obj-$(CONFIG_I2C_TEGRA)		+= i2c-tegra.o
obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
obj-$(CONFIG_I2C_EG20T)         += i2c-eg20t.o
obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o

# External I2C/SMBus adapter drivers
obj-$(CONFIG_I2C_DIOLAN_U2C)	+= i2c-diolan-u2c.o
+1 −1
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ static int __init dw_i2c_init_driver(void)
{
	return platform_driver_probe(&dw_i2c_driver, dw_i2c_probe);
}
module_init(dw_i2c_init_driver);
subsys_initcall(dw_i2c_init_driver);

static void __exit dw_i2c_exit_driver(void)
{
+21 −23
Original line number Diff line number Diff line
@@ -271,32 +271,38 @@ static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
/**
 * pch_i2c_wait_for_bus_idle() - check the status of bus.
 * @adap:	Pointer to struct i2c_algo_pch_data.
 * @timeout:	waiting time counter (us).
 * @timeout:	waiting time counter (ms).
 */
static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
				     s32 timeout)
{
	void __iomem *p = adap->pch_base_address;
	ktime_t ns_val;

	if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
		return 0;

	/* MAX timeout value is timeout*1000*1000nsec */
	ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
	do {
		msleep(20);
		if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
			return 0;
	} while (ktime_lt(ktime_get(), ns_val));
	int schedule = 0;
	unsigned long end = jiffies + msecs_to_jiffies(timeout);

	while (ioread32(p + PCH_I2CSR) & I2CMBB_BIT) {
		if (time_after(jiffies, end)) {
			pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
	pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
			pch_err(adap, "%s: Timeout Error.return%d\n",
					__func__, -ETIME);
			pch_i2c_init(adap);

			return -ETIME;
		}

		if (!schedule)
			/* Retry after some usecs */
			udelay(5);
		else
			/* Wait a bit more without consuming CPU */
			usleep_range(20, 1000);

		schedule = 1;
	}

	return 0;
}

/**
 * pch_i2c_start() - Generate I2C start condition in normal mode.
 * @adap:	Pointer to struct i2c_algo_pch_data.
@@ -778,8 +784,6 @@ static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
	struct i2c_msg *pmsg;
	u32 i = 0;
	u32 status;
	u32 msglen;
	u32 subaddrlen;
	s32 ret;

	struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
@@ -804,12 +808,6 @@ static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
		status = pmsg->flags;
		pch_dbg(adap,
			"After invoking I2C_MODE_SEL :flag= 0x%x\n", status);
		/* calculate sub address length and message length */
		/* these are applicable only for buffer mode */
		subaddrlen = pmsg->buf[0];
		/* calculate actual message length excluding
		 * the sub address fields */
		msglen = (pmsg->len) - (subaddrlen + 1);

		if ((status & (I2C_M_RD)) != false) {
			ret = pch_i2c_readbytes(i2c_adap, pmsg, (i + 1 == num),
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