Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fc147310 authored by Andrey Smirnov's avatar Andrey Smirnov Committed by Russell King
Browse files

ARM: 8592/1: cache-l2x0.c: Replace magic numbers



Replace magic numbers used for L310 Prefetch Control Register

Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarAndrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 7d281b62
Loading
Loading
Loading
Loading
+4 −2
Original line number Diff line number Diff line
@@ -710,8 +710,10 @@ static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
	    revision < L310_CACHE_ID_RTL_R3P2) {
		u32 val = l2x0_saved_regs.prefetch_ctrl;
		/* I don't think bit23 is required here... but iMX6 does so */
		if (val & (BIT(30) | BIT(23))) {
			val &= ~(BIT(30) | BIT(23));
		if (val & (L310_PREFETCH_CTRL_DBL_LINEFILL |
			   L310_PREFETCH_CTRL_DBL_LINEFILL_INCR)) {
			val &= ~(L310_PREFETCH_CTRL_DBL_LINEFILL |
				 L310_PREFETCH_CTRL_DBL_LINEFILL_INCR);
			l2x0_saved_regs.prefetch_ctrl = val;
			errata[n++] = "752271";
		}