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Commit fbd8d583 authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Masahiro Yamada
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ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2 



Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.

Furthermore, add cpuN labels for reference in cooling-device property.

Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 2bd6bf03

arch/arm/boot/dts/uniphier-pxs2.dtsi

+43 −4
Original line number Original line Diff line number Diff line
@@ -7,6 +7,8 @@ 
 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)

 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)

 */

 */





#include <dt-bindings/thermal/thermal.h>



/ {

/ {

	compatible = "socionext,uniphier-pxs2";

	compatible = "socionext,uniphier-pxs2";

	#address-cells = <1>;

	#address-cells = <1>;
@@ -16,7 +18,7 @@ 
		#address-cells = <1>;

		#address-cells = <1>;

		#size-cells = <0>;

		#size-cells = <0>;





		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			reg = <0>;

			reg = <0>;
@@ -24,9 +26,10 @@ 
			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&l2>;

			next-level-cache = <&l2>;

			operating-points-v2 = <&cpu_opp>;

			operating-points-v2 = <&cpu_opp>;

			#cooling-cells = <2>;

		};

		};





		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			reg = <1>;

			reg = <1>;
@@ -36,7 +39,7 @@ 
			operating-points-v2 = <&cpu_opp>;

			operating-points-v2 = <&cpu_opp>;

		};

		};





		cpu@2 {

		cpu2: cpu@2 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			reg = <2>;

			reg = <2>;
@@ -46,7 +49,7 @@ 
			operating-points-v2 = <&cpu_opp>;

			operating-points-v2 = <&cpu_opp>;

		};

		};





		cpu@3 {

		cpu3: cpu@3 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			reg = <3>;

			reg = <3>;
@@ -114,6 +117,35 @@ 
		};

		};

	};

	};





	thermal-zones {

		cpu-thermal {

			polling-delay-passive = <250>;	/* 250ms */

			polling-delay = <1000>;		/* 1000ms */

			thermal-sensors = <&pvtctl>;



			trips {

				cpu_crit: cpu-crit {

					temperature = <95000>;	/* 95C */

					hysteresis = <2000>;

					type = "critical";

				};

				cpu_alert: cpu-alert {

					temperature = <85000>;	/* 85C */

					hysteresis = <2000>;

					type = "passive";

				};

			};



			cooling-maps {

				map {

					trip = <&cpu_alert>;

					cooling-device = <&cpu0

					    THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};

	};



	soc {

	soc {

		compatible = "simple-bus";

		compatible = "simple-bus";

		#address-cells = <1>;

		#address-cells = <1>;
@@ -358,6 +390,13 @@ 
				compatible = "socionext,uniphier-pxs2-reset";

				compatible = "socionext,uniphier-pxs2-reset";

				#reset-cells = <1>;

				#reset-cells = <1>;

			};

			};



			pvtctl: pvtctl {

				compatible = "socionext,uniphier-pxs2-thermal";

				interrupts = <0 3 4>;

				#thermal-sensor-cells = <0>;

				socionext,tmod-calibration = <0x0f86 0x6844>;

			};

		};

		};





		nand: nand@68000000 {

		nand: nand@68000000 {