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Commit fb914ebf authored by Vitaliy Ivanov's avatar Vitaliy Ivanov Committed by Jiri Kosina
Browse files

treewide: typo 'interrrupt' word corrections. 



Signed-off-by: default avatarJustin P. Mattock <justinmattock@gmail.com>
Signed-off-by: default avatarVitaliy Ivanov <vitalivanov@gmail.com>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.cz>
parent e809ab01

arch/arm/mach-omap2/smartreflex.c

+1 −1
Original line number Diff line number Diff line
@@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr) 
 * driver register and sr device intializtion API's. Only one call

 * will ultimately succeed.

 *

 * Currently this function registers interrrupt handler for a particular SR

 * Currently this function registers interrupt handler for a particular SR

 * if smartreflex class driver is already registered and has

 * requested for interrupts and the SR interrupt line in present.

 */

arch/powerpc/platforms/embedded6xx/storcenter.c

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ static void __init storcenter_setup_arch(void) 
}



/*

 * Interrupt setup and service.  Interrrupts on the turbostation come

 * Interrupt setup and service.  Interrupts on the turbostation come

 * from the four PCI slots plus onboard 8241 devices: I2C, DUART.

 */

static void __init storcenter_init_IRQ(void)

drivers/net/arm/ks8695net.c

+1 −1
Original line number Diff line number Diff line
@@ -414,7 +414,7 @@ ks8695_tx_irq(int irq, void *dev_id) 
 *    Interrupt Status Register (Offset 0xF208)

 *        Bit29: WAN MAC Receive Status

 *        Bit16: LAN MAC Receive Status

 *    So, this Rx interrrupt enable/status bit number is equal

 *    So, this Rx interrupt enable/status bit number is equal

 *    as Rx IRQ number.

 */

static inline u32 ks8695_get_rx_enable_bit(struct ks8695_priv *ksp)

drivers/net/atlx/atl1.c

+1 −1
Original line number Diff line number Diff line
@@ -858,7 +858,7 @@ static s32 atl1_init_hw(struct atl1_hw *hw) 
	atl1_init_flash_opcode(hw);



	if (!hw->phy_configured) {

		/* enable GPHY LinkChange Interrrupt */

		/* enable GPHY LinkChange Interrupt */

		ret_val = atl1_write_phy_reg(hw, 18, 0xC00);

		if (ret_val)

			return ret_val;

drivers/net/bnx2.h

+6 −6
Original line number Diff line number Diff line
@@ -5617,7 +5617,7 @@ struct l2_fhdr { 
#define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_TXP_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_TXP_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_TXP_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_TXP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_TXP_CPU_STATE_BLOCKED_READ			 (1L<<31)
@@ -5712,7 +5712,7 @@ struct l2_fhdr { 
#define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_TPAT_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_TPAT_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_TPAT_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_TPAT_CPU_STATE_BLOCKED_READ		 (1L<<31)
@@ -5807,7 +5807,7 @@ struct l2_fhdr { 
#define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_RXP_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_RXP_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_RXP_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_RXP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_RXP_CPU_STATE_BLOCKED_READ			 (1L<<31)
@@ -5953,7 +5953,7 @@ struct l2_fhdr { 
#define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_COM_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_COM_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_COM_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_COM_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_COM_CPU_STATE_BLOCKED_READ			 (1L<<31)
@@ -6119,7 +6119,7 @@ struct l2_fhdr { 
#define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_CP_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_CP_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_CP_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_CP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_CP_CPU_STATE_BLOCKED_READ			 (1L<<31)
@@ -6291,7 +6291,7 @@ struct l2_fhdr { 
#define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)

#define BNX2_MCP_CPU_STATE_SOFT_HALTED			 (1L<<10)

#define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)

#define BNX2_MCP_CPU_STATE_INTERRRUPT			 (1L<<12)

#define BNX2_MCP_CPU_STATE_INTERRUPT			 (1L<<12)

#define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)

#define BNX2_MCP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)

#define BNX2_MCP_CPU_STATE_BLOCKED_READ			 (1L<<31)