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Commit fac8a5b2 authored by Tobias Jakobi's avatar Tobias Jakobi Committed by Inki Dae
Browse files

drm/exynos: mixer: remove buffer count handling in vp_video_buffer() 



The video processor (VP) supports four formats: NV12, NV21 and its
tiled variants. All these formats are bi-planar, so the buffer
count in vp_video_buffer() is always 2.

Also properly exit if we're called with an invalid (non-VP) pixelformat.

Signed-off-by: default avatarTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent 5d878bdb

drivers/gpu/drm/exynos/exynos_mixer.c

+2 −15
Original line number Diff line number Diff line
@@ -382,7 +382,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) 
	struct mixer_resources *res = &ctx->mixer_res;

	unsigned long flags;

	struct exynos_drm_plane *plane;

	unsigned int buf_num = 1;

	dma_addr_t luma_addr[2], chroma_addr[2];

	bool tiled_mode = false;

	bool crcb_mode = false;
@@ -393,27 +392,15 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) 
	switch (plane->pixel_format) {

	case DRM_FORMAT_NV12:

		crcb_mode = false;

		buf_num = 2;

		break;

	/* TODO: single buffer format NV12, NV21 */

	default:

		/* ignore pixel format at disable time */

		if (!plane->dma_addr[0])

			break;



		DRM_ERROR("pixel format for vp is wrong [%d].\n",

				plane->pixel_format);

		return;

	}



	if (buf_num == 2) {

	luma_addr[0] = plane->dma_addr[0];

	chroma_addr[0] = plane->dma_addr[1];

	} else {

		luma_addr[0] = plane->dma_addr[0];

		chroma_addr[0] = plane->dma_addr[0]

			+ (plane->pitch * plane->fb_height);

	}



	if (plane->scan_flag & DRM_MODE_FLAG_INTERLACE) {

		ctx->interlace = true;