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Commit fa769d3f authored by Christophe Leroy's avatar Christophe Leroy Committed by Scott Wood
Browse files

powerpc/32: Enable HW_BREAKPOINT on BOOK3S 



BOOK3S also has DABR register and capability to handle data
breakpoints, so this patch enable it on all BOOK3S, not only 64 bits.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarScott Wood <oss@buserror.net>
parent fdc8c4ad

arch/powerpc/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ config PPC 
	select HAVE_PERF_REGS

	select HAVE_PERF_USER_STACK_DUMP

	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64

	select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S

	select ARCH_WANT_IPC_PARSE_VERSION

	select SPARSE_IRQ

	select IRQ_DOMAIN

arch/powerpc/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -225,6 +225,7 @@ struct thread_struct { 
#ifdef CONFIG_PPC64

	unsigned long	start_tb;	/* Start purr when proc switched in */

	unsigned long	accum_tb;	/* Total accumulated purr for process */

#endif

#ifdef CONFIG_HAVE_HW_BREAKPOINT

	struct perf_event *ptrace_bps[HBP_NUM];

	/*
@@ -233,7 +234,6 @@ struct thread_struct { 
	 */

	struct perf_event *last_hit_ubp;

#endif /* CONFIG_HAVE_HW_BREAKPOINT */

#endif

	struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */

	unsigned long	trap_nr;	/* last trap # on this thread */

	u8 load_fp;