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Commit fa0123c5 authored by Vaibhav Agrawal's avatar Vaibhav Agrawal Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add the hwkm ice slave regions to storage node 

The HWKM ICE slave memory regions are different for UFS and
EMMC storage type. We parse the values in the storage related
drivers now hence adding the memory regions to the corresponding
storage driver dtsi nodes for holi, shima and lahaina.

Change-Id: I5bec8a164f3b947d5d6ef6fcfc384624b1fa58ca
parent fca6265a

qcom/holi.dtsi

+9 −6
Original line number Diff line number Diff line
@@ -2030,8 +2030,9 @@ 
	ufshc_mem: ufshc@4804000 {

		compatible = "qcom,ufshc";

		reg = <0x4804000 0x3000>,

		      <0x4808000 0x8000>;

		reg-names = "ufs_mem", "ufs_ice";

		      <0x4808000 0x8000>,

		      <0x4810000 0x9000>;

		reg-names = "ufs_mem", "ufs_ice", "ufs_ice_hwkm";

		interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&ufsphy_mem>;

		phy-names = "ufsphy";
@@ -2131,8 +2132,10 @@ 


	sdhc_1: sdhci@4744000 {

		compatible = "qcom,sdhci-msm-v5";

		reg = <0x04744000 0x1000>, <0x04745000 0x1000>, <0x04748000 0x8000>;

		reg-names = "hc_mem", "cqhci_mem", "cqhci_ice";

		reg = <0x04744000 0x1000>, <0x04745000 0x1000>,

			<0x04748000 0x8000>, <0x04750000 0x9000>;

		reg-names = "hc_mem", "cqhci_mem", "cqhci_ice",

			    "cqhci_ice_hwkm";



		iommus = <&apps_smmu 0x20 0x0>;

		qcom,iommu-dma = "fastmap";
@@ -2509,8 +2512,8 @@ 


	qcom_hwkm: hwkm@4440000 {

		compatible = "qcom,hwkm";

		reg = <0x4440000 0x9000>, <0x04810000 0x9000>, <0x04750000 0x9000>;

		reg-names = "km_master", "ice_slave", "sdcc_ice_slave";

		reg = <0x4440000 0x9000>, <0x04810000 0x9000>;

		reg-names = "km_master", "ice_slave";

		qcom,enable-hwkm-clk;

		clock-names = "km_clk_src";

		clocks = <&rpmcc RPM_SMD_HWKM_CLK>;

qcom/lahaina.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -3045,8 +3045,9 @@ 
	ufshc_mem: ufshc@1d84000 {

		compatible = "qcom,ufshc";

		reg = <0x1d84000 0x3000>,

		      <0x1d88000 0x8000>;

		reg-names = "ufs_mem", "ufs_ice";

		      <0x1d88000 0x8000>,

		      <0x1d90000 0x9000>;

		reg-names = "ufs_mem", "ufs_ice", "ufs_ice_hwkm";

		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&ufsphy_mem>;

		phy-names = "ufsphy";

qcom/shima.dtsi

+7 −4
Original line number Diff line number Diff line
@@ -1615,8 +1615,9 @@ 
	ufshc_mem: ufshc@1d84000 {

		compatible = "qcom,ufshc";

		reg = <0x1d84000 0x3000>,

		      <0x1d88000 0x8000>;

		reg-names = "ufs_mem", "ufs_ice";

		      <0x1d88000 0x8000>,

		      <0x1d90000 0x9000>;

		reg-names = "ufs_mem", "ufs_ice", "ufs_ice_hwkm";

		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&ufsphy_mem>;

		phy-names = "ufsphy";
@@ -1752,8 +1753,10 @@ 


	sdhc_1: sdhci@7C4000 {

		compatible = "qcom,sdhci-msm-v5";

		reg = <0x007C4000 0x1000>, <0x007C5000 0x1000>;

		reg-names = "hc_mem", "cqhci_mem";

		reg = <0x007C4000 0x1000>, <0x007C5000 0x1000>,

		      <0x007c8000 0x8000>, <0x7d0000 0x9000>;

		reg-names = "hc_mem", "cqhci_mem", "cqhci_ice",

			    "cqhci_ice_hwkm";



		iommus = <&apps_smmu 0xc0 0x0>;

		dma-coherent;