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Commit f993604d authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlx5-next' 



Saeed Mahameed says:

====================
QoS and VxLAN offloads support for Mellanox 100G mlx5 driver

This patch series introduces QoS IEEE dcbnl support for
PFC, ETS and max rate.

In addition we added VxLAN support and introduced a patch
that modifies the driver to report checksum complete in RX path
for all IP (tunneled and non-tunneled) traffic which is non HW LRO.

This series is applied on top of the latest mlx5_ifc and NDO fixes
we sent to the net tree:
	net/mlx5e: Use static constant netdevice ndos
	net/mlx5e: Remove select queue ndo initialization
	net/mlx5: Use offset based reserved field names in the IFC header file

The QoS patches depend on the IFC change since they expose new fields in
the driver/firmware API. Both QoS and VxLAN patches depend on the NDO changes,
since they add new ndo entries.

Changes from V1:
	- Fixed the S.O.B from "Matt" to "Matthew" to be aligned with the committer title.
	- Don't populate VxLAN/dcbnl ndos for virtual functions.
	- Addressed John comment on mlx5_setup_tc to be aligned with latest API changes.
	- Added device ETS capability check prior query/modify ets configuration.
	- Call mlx5e_dcbnl_ieee_setets_core at the end of mlx5e_create_netdev and don't
fail netdev creation in case it failed or ETS was not supported.

The series where applied on top of: ("5270c4da Merge branch 'vxlan-cleanups'") +
	latest mlx5 ifc and ndo fixes from net tree.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e5fbfc1c 89db09eb

drivers/infiniband/hw/mlx5/main.c

+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ 
#include <rdma/ib_user_verbs.h>

#include <rdma/ib_addr.h>

#include <rdma/ib_cache.h>

#include <linux/mlx5/port.h>

#include <linux/mlx5/vport.h>

#include <rdma/ib_smi.h>

#include <rdma/ib_umem.h>

drivers/net/ethernet/mellanox/mlx5/core/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -19,3 +19,15 @@ config MLX5_CORE_EN 
	  Ethernet support in Mellanox Technologies ConnectX-4 NIC.

	  Ethernet and Infiniband support in ConnectX-4 are currently mutually

	  exclusive.



config MLX5_CORE_EN_DCB

	bool "Data Center Bridging (DCB) Support"

	default y

	depends on MLX5_CORE_EN && DCB

	---help---

	  Say Y here if you want to use Data Center Bridging (DCB) in the

	  driver.

	  If set to N, will not be able to configure QoS and ratelimit attributes.

	  This flag is depended on the kernel's DCB support.



	  If unsure, set to Y

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -3,6 +3,9 @@ obj-$(CONFIG_MLX5_CORE) += mlx5_core.o 
mlx5_core-y :=	main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \

		health.o mcg.o cq.o srq.o alloc.o qp.o port.o mr.o pd.o   \

		mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o



mlx5_core-$(CONFIG_MLX5_CORE_EN) += wq.o eswitch.o \

		en_main.o en_fs.o en_ethtool.o en_tx.o en_rx.o \

		en_txrx.o en_clock.o
 
		en_txrx.o en_clock.o vxlan.o



mlx5_core-$(CONFIG_MLX5_CORE_EN_DCB) +=  en_dcbnl.o

drivers/net/ethernet/mellanox/mlx5/core/cmd.c

+13 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.

 * Copyright (c) 2013-2016, Mellanox Technologies. All rights reserved.

 *

 * This software is available to you under a choice of one of two

 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -560,6 +560,18 @@ const char *mlx5_command_str(int command) 
	case MLX5_CMD_OP_ACCESS_REG:

		return "MLX5_CMD_OP_ACCESS_REG";



	case MLX5_CMD_OP_SET_WOL_ROL:

		return "SET_WOL_ROL";



	case MLX5_CMD_OP_QUERY_WOL_ROL:

		return "QUERY_WOL_ROL";



	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:

		return "ADD_VXLAN_UDP_DPORT";



	case MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT:

		return "DELETE_VXLAN_UDP_DPORT";



	default: return "unknown command opcode";

	}

}

drivers/net/ethernet/mellanox/mlx5/core/en.h

+39 −5
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.

 * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved.

 *

 * This software is available to you under a choice of one of two

 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -29,6 +29,8 @@ 
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

 * SOFTWARE.

 */

#ifndef __MLX5_EN_H__

#define __MLX5_EN_H__



#include <linux/if_vlan.h>

#include <linux/etherdevice.h>
@@ -38,6 +40,7 @@ 
#include <linux/mlx5/driver.h>

#include <linux/mlx5/qp.h>

#include <linux/mlx5/cq.h>

#include <linux/mlx5/port.h>

#include <linux/mlx5/vport.h>

#include <linux/mlx5/transobj.h>

#include "wq.h"
@@ -69,6 +72,11 @@ 


#define MLX5E_NUM_MAIN_GROUPS 9



#ifdef CONFIG_MLX5_CORE_EN_DCB

#define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */

#define MLX5E_MIN_BW_ALLOC 1   /* Min percentage of BW allocation */

#endif



static const char vport_strings[][ETH_GSTRING_LEN] = {

	/* vport statistics */

	"rx_packets",
@@ -95,12 +103,15 @@ static const char vport_strings[][ETH_GSTRING_LEN] = { 
	/* SW counters */

	"tso_packets",

	"tso_bytes",

	"tso_inner_packets",

	"tso_inner_bytes",

	"lro_packets",

	"lro_bytes",

	"rx_csum_good",

	"rx_csum_none",

	"rx_csum_sw",

	"tx_csum_offload",

	"tx_csum_inner",

	"tx_queue_stopped",

	"tx_queue_wake",

	"tx_queue_dropped",
@@ -133,18 +144,21 @@ struct mlx5e_vport_stats { 
	/* SW counters */

	u64 tso_packets;

	u64 tso_bytes;

	u64 tso_inner_packets;

	u64 tso_inner_bytes;

	u64 lro_packets;

	u64 lro_bytes;

	u64 rx_csum_good;

	u64 rx_csum_none;

	u64 rx_csum_sw;

	u64 tx_csum_offload;

	u64 tx_csum_inner;

	u64 tx_queue_stopped;

	u64 tx_queue_wake;

	u64 tx_queue_dropped;

	u64 rx_wqe_err;



#define NUM_VPORT_COUNTERS     32

#define NUM_VPORT_COUNTERS     35

};



static const char pport_strings[][ETH_GSTRING_LEN] = {
@@ -244,7 +258,10 @@ static const char sq_stats_strings[][ETH_GSTRING_LEN] = { 
	"packets",

	"tso_packets",

	"tso_bytes",

	"tso_inner_packets",

	"tso_inner_bytes",

	"csum_offload_none",

	"csum_offload_inner",

	"stopped",

	"wake",

	"dropped",
@@ -255,12 +272,15 @@ struct mlx5e_sq_stats { 
	u64 packets;

	u64 tso_packets;

	u64 tso_bytes;

	u64 tso_inner_packets;

	u64 tso_inner_bytes;

	u64 csum_offload_none;

	u64 csum_offload_inner;

	u64 stopped;

	u64 wake;

	u64 dropped;

	u64 nop;

#define NUM_SQ_STATS 8

#define NUM_SQ_STATS 11

};



struct mlx5e_stats {
@@ -272,7 +292,6 @@ struct mlx5e_params { 
	u8  log_sq_size;

	u8  log_rq_size;

	u16 num_channels;

	u8  default_vlan_prio;

	u8  num_tc;

	u16 rx_cq_moderation_usec;

	u16 rx_cq_moderation_pkts;
@@ -285,6 +304,9 @@ struct mlx5e_params { 
	u8  rss_hfunc;

	u8  toeplitz_hash_key[40];

	u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];

#ifdef CONFIG_MLX5_CORE_EN_DCB

	struct ieee_ets ets;

#endif

};



struct mlx5e_tstamp {
@@ -491,6 +513,11 @@ struct mlx5e_vlan_db { 
	bool          filter_disabled;

};



struct mlx5e_vxlan_db {

	spinlock_t			lock; /* protect vxlan table */

	struct radix_tree_root		tree;

};



struct mlx5e_flow_table {

	int num_groups;

	struct mlx5_flow_table		*t;
@@ -505,7 +532,6 @@ struct mlx5e_flow_tables { 


struct mlx5e_priv {

	/* priv data path fields - start */

	int                        default_vlan_prio;

	struct mlx5e_sq            **txq_to_sq_map;

	int channeltc_to_txq_map[MLX5E_MAX_NUM_CHANNELS][MLX5E_MAX_NUM_TC];

	/* priv data path fields - end */
@@ -526,6 +552,7 @@ struct mlx5e_priv { 
	struct mlx5e_flow_tables   fts;

	struct mlx5e_eth_addr_db   eth_addr;

	struct mlx5e_vlan_db       vlan;

	struct mlx5e_vxlan_db      vxlan;



	struct mlx5e_params        params;

	spinlock_t                 async_events_spinlock; /* sync hw events */
@@ -665,4 +692,11 @@ static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) 
}



extern const struct ethtool_ops mlx5e_ethtool_ops;

#ifdef CONFIG_MLX5_CORE_EN_DCB

extern const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops;

int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets);

#endif



u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev);



#endif /* __MLX5_EN_H__ */