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Commit f91022c2 authored by Gaurav Kohli's avatar Gaurav Kohli
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drivers: edac: Add Lahaina CPU gold core part id for kryo edac 



Add Lahaina CPU gold core part id macro for kryo edac. This is needed
while parsing the L1/L2/L3 cache errors.

Change-Id: I48230c3b5f498fc6d02625d22a410ed94c90543c
Signed-off-by: default avatarGaurav Kohli <gkohli@codeaurora.org>
parent 69e5f829

drivers/edac/kryo_arm64_edac.c

+3 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#define QCOM_CPU_PART_KRYO4XX_SILVER_V2 0x805



#define QCOM_CPU_PART_KRYO6XX_SILVER_V1 0xD05

#define QCOM_CPU_PART_KRYO6XX_GOLD 0xD41

#define QCOM_CPU_PART_KRYO6XX_GOLDPLUS 0xD44



#define L1_GOLD_IC_BIT 0x1
@@ -262,6 +263,7 @@ static void dump_err_reg(int errorcode, int level, u64 errxstatus, u64 errxmisc, 
			break;

		case QCOM_CPU_PART_KRYO4XX_GOLD:

		case QCOM_CPU_PART_KRYO5XX_GOLD:

		case QCOM_CPU_PART_KRYO6XX_GOLD:

		case QCOM_CPU_PART_KRYO6XX_GOLDPLUS:

			way = (int) KRYO_ERRXMISC_WAY(errxmisc);

			break;
@@ -303,6 +305,7 @@ static void kryo_parse_l1_l2_cache_error(u64 errxstatus, u64 errxmisc, 
		break;

	case QCOM_CPU_PART_KRYO4XX_GOLD:

	case QCOM_CPU_PART_KRYO5XX_GOLD:

	case QCOM_CPU_PART_KRYO6XX_GOLD:

	case QCOM_CPU_PART_KRYO6XX_GOLDPLUS:

		switch (KRYO_ERRXMISC_LVL_GOLD(errxmisc)) {

		case L1_GOLD_DC_BIT: