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Commit f8f1def0 authored by Jigar Agrawal's avatar Jigar Agrawal
Browse files

msm: camera: common: Print error irq count in csid irq



Make STREAM_UNDERFLOW, ERROR_ECC and ERROR_CPHY_PH_CRC
fatal errors. Print IRQ error counts for non fatal
errors.

CRs-Fixed: 2882318
Change-Id: Id98bfd166071b2fe58fb9c129259c747f746b259
Signed-off-by: default avatarJigar Agrawal <jigar@codeaurora.org>
parent 6ef67985
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+18 −4
Original line number Diff line number Diff line
@@ -4842,6 +4842,7 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
	uint32_t                                        irq_status[CAM_IFE_CSID_IRQ_REG_MAX] = {0};
	uint32_t                                        i, val, val2;
	bool                                            fatal_err_detected = false;
	bool                                            non_fatal_detected = false;
	uint32_t                                        sof_irq_debug_en = 0;
	uint32_t                                        event_type = 0;
	unsigned long                                   flags;
@@ -5024,6 +5025,7 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
				"CSID:%d CPHY_EOT_RECEPTION: No EOT on lane/s",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			non_fatal_detected = true;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION) {
@@ -5031,13 +5033,15 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
				"CSID:%d CPHY_SOT_RECEPTION: Less SOTs on lane/s",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			non_fatal_detected = true;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_CPHY_PH_CRC) {
			CAM_ERR_RATE_LIMIT(CAM_ISP,
				"CSID:%d CPHY_PH_CRC CPHY: Pkt Hdr CRC mismatch",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			fatal_err_detected = true;
			goto handle_fatal_error;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_CRC) {
@@ -5045,13 +5049,15 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
				"CSID:%d ERROR_CRC CPHY: Long pkt payload CRC mismatch",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			non_fatal_detected = true;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_ECC) {
			CAM_ERR_RATE_LIMIT(CAM_ISP,
				"CSID:%d ERROR_ECC: Dphy pkt hdr errors unrecoverable",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			fatal_err_detected = true;
			goto handle_fatal_error;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_MMAPPED_VC_DT) {
@@ -5069,13 +5075,14 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
				CSID_DEBUG_ENABLE_UNMAPPED_VC_DT_IRQ)) {

			val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
			csi2_reg->csid_csi2_rx_captured_long_pkt_0_addr);
			csi2_reg->csid_csi2_rx_cap_unmap_long_pkt_hdr_0_addr);

			CAM_ERR_RATE_LIMIT(CAM_ISP,
				"CSID:%d UNMAPPED_VC_DT: VC:%d DT:%d WC:%d not mapped to any csid paths",
				csid_hw->hw_intf->hw_idx, (val >> 22),
				((val >> 16) & 0x3F), (val & 0xFFFF));
			csid_hw->error_irq_count++;
			non_fatal_detected = true;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_STREAM_UNDERFLOW) {
@@ -5085,7 +5092,8 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
			CAM_ERR_RATE_LIMIT(CAM_ISP,
				"CSID:%d ERROR_STREAM_UNDERFLOW: Fewer bytes rcvd than WC:%d in pkt hdr",
				csid_hw->hw_intf->hw_idx, (val & 0xFFFF));
			csid_hw->error_irq_count++;
			fatal_err_detected = true;
			goto handle_fatal_error;
		}
		if (irq_status[CAM_IFE_CSID_IRQ_REG_RX] &
			CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME) {
@@ -5093,7 +5101,13 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data)
				"CSID:%d UNBOUNDED_FRAME: Frame started with EOF or No EOF",
				csid_hw->hw_intf->hw_idx);
			csid_hw->error_irq_count++;
			non_fatal_detected = true;
		}

		if (non_fatal_detected)
			CAM_INFO(CAM_ISP, "CSID: %u Error IRQ Count:%u",
				csid_hw->hw_intf->hw_idx,
				csid_hw->error_irq_count++);
	}

handle_fatal_error: