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Commit f8dd3119 authored by Sylvain Munaut's avatar Sylvain Munaut Committed by Paul Mackerras
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[PATCH] ppc32: Adds support for the LITE5200B dev board 



ppc32: Adds support for the LITE5200B dev board

This LITE5200B devboard is the new development board for the
Freescale MPC5200 processor. It has two PCI slots and so a
different PCI IRQ routing.

Signed-off-by: default avatarJohn Rigby <jrigby@freescale.com>
Signed-off-by: default avatarSylvain Munaut <tnt@246tNt.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 5931c435

arch/ppc/Kconfig

+7 −0
Original line number Original line Diff line number Diff line
@@ -715,6 +715,13 @@ config LITE5200 
	  much but it's only been tested on this board version. I think this

	  much but it's only been tested on this board version. I think this

	  board is also known as IceCube.

	  board is also known as IceCube.





config LITE5200B

	bool "Freescale LITE5200B"

	depends LITE5200

	help

	  Support for the LITE5200B dev board for the MPC5200 from Freescale.

	  This is the new board with 2 PCI slots.



config MPC834x_SYS

config MPC834x_SYS

	bool "Freescale MPC834x SYS"

	bool "Freescale MPC834x SYS"

	help

	help

arch/ppc/platforms/lite5200.c

+30 −3
Original line number Original line Diff line number Diff line
@@ -34,6 +34,7 @@ 
#include <asm/mpc52xx.h>

#include <asm/mpc52xx.h>

#include <asm/ppc_sys.h>

#include <asm/ppc_sys.h>

#include <asm/machdep.h>

#include <asm/machdep.h>

#include <asm/pci-bridge.h>





#include <syslib/mpc52xx_pci.h>

#include <syslib/mpc52xx_pci.h>
@@ -68,12 +69,32 @@ lite5200_show_cpuinfo(struct seq_file *m) 
}

}





#ifdef CONFIG_PCI

#ifdef CONFIG_PCI

#ifdef CONFIG_LITE5200B

static int

lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,

		    unsigned char pin)

{

	static char pci_irq_table[][4] =

	/*

	 *      PCI IDSEL/INTPIN->INTLINE

	 *        A             B             C             D

	 */

	{

		{MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},

		{MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},

	};



	const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;

	return PCI_IRQ_TABLE_LOOKUP;

}

#else /* Original Lite */

static int

static int

lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)

lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)

{

{

	return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;

	return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;

}

}

#endif

#endif

#endif





static void __init

static void __init

lite5200_setup_cpu(void)

lite5200_setup_cpu(void)
@@ -127,11 +148,17 @@ lite5200_setup_cpu(void) 
	out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);

	out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);

	out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);

	out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);





	/* IRQ[0-3] setup : IRQ0     - Level Active Low  */

	/* IRQ[0-3] setup */

	/*                  IRQ[1-3] - Level Active High */

	intr_ctrl = in_be32(&intr->ctrl);

	intr_ctrl = in_be32(&intr->ctrl);

	intr_ctrl &= ~0x00ff0000;

	intr_ctrl &= ~0x00ff0000;

#ifdef CONFIG_LITE5200B

	/* IRQ[0-3] Level Active Low */

	intr_ctrl |=  0x00ff0000;

#else

	/* IRQ0 Level Active Low

	 * IRQ[1-3] Level Active High */

 	intr_ctrl |=  0x00c00000;

 	intr_ctrl |=  0x00c00000;

#endif

	out_be32(&intr->ctrl, intr_ctrl);

	out_be32(&intr->ctrl, intr_ctrl);





	/* Unmap reg zone */

	/* Unmap reg zone */