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Commit f8c0fcac authored by Jiang Liu's avatar Jiang Liu Committed by Bjorn Helgaas
Browse files

e1000e: Use PCI Express Capability accessors 



Use PCI Express Capability access functions to simplify e1000e driver.

[bhelgaas: split e1000e and igb into separate patches]
Signed-off-by: default avatarJiang Liu <jiang.liu@huawei.com>
Signed-off-by: default avatarYijing Wang <wangyijing@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 0f49bfbd

drivers/net/ethernet/intel/e1000e/netdev.c

+8 −19
Original line number Original line Diff line number Diff line
@@ -5570,16 +5570,15 @@ static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 
	 */

	 */

	if (adapter->flags & FLAG_IS_QUAD_PORT) {

	if (adapter->flags & FLAG_IS_QUAD_PORT) {

		struct pci_dev *us_dev = pdev->bus->self;

		struct pci_dev *us_dev = pdev->bus->self;

		int pos = pci_pcie_cap(us_dev);

		u16 devctl;

		u16 devctl;





		pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);

		pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);

		pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,

		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,

					   (devctl & ~PCI_EXP_DEVCTL_CERE));

					   (devctl & ~PCI_EXP_DEVCTL_CERE));





		e1000_power_off(pdev, sleep, wake);

		e1000_power_off(pdev, sleep, wake);





		pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);

		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);

	} else {

	} else {

		e1000_power_off(pdev, sleep, wake);

		e1000_power_off(pdev, sleep, wake);

	}

	}
@@ -5593,25 +5592,15 @@ static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 
#else

#else

static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)

static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)

{

{

	int pos;

	u16 reg16;



	/*

	/*

	 * Both device and parent should have the same ASPM setting.

	 * Both device and parent should have the same ASPM setting.

	 * Disable ASPM in downstream component first and then upstream.

	 * Disable ASPM in downstream component first and then upstream.

	 */

	 */

	pos = pci_pcie_cap(pdev);

	pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, state);

	pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);

	reg16 &= ~state;

	pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);



	if (!pdev->bus->self)

		return;





	pos = pci_pcie_cap(pdev->bus->self);

	if (pdev->bus->self)

	pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);

		pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL,

	reg16 &= ~state;

					   state);

	pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);

}

}

#endif

#endif

static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)

static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)