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Commit f7275345 authored by Ondrej Jirman's avatar Ondrej Jirman Committed by Linus Walleij
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pinctrl: sunxi: Prepare for alternative bias voltage setting methods 



H6 has a different I/O voltage bias setting method than A80. Prepare
existing code for using alternative bias voltage setting methods.

Signed-off-by: default avatarOndrej Jirman <megous@megous.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 483d70d7

drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c

+1 −1
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_data = { 
	.pin_base = PL_BASE,

	.irq_banks = 2,

	.disable_strict_mode = true,

	.has_io_bias_cfg = true,

	.io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG,

};



static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev)

drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c

+1 −1
Original line number Diff line number Diff line
@@ -722,7 +722,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_data = { 
	.npins = ARRAY_SIZE(sun9i_a80_pins),

	.irq_banks = 5,

	.disable_strict_mode = true,

	.has_io_bias_cfg = true,

	.io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG,

};



static int sun9i_a80_pinctrl_probe(struct platform_device *pdev)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

+27 −20
Original line number Diff line number Diff line
@@ -617,7 +617,7 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, 
	u32 val, reg;

	int uV;



	if (!pctl->desc->has_io_bias_cfg)

	if (!pctl->desc->io_bias_cfg_variant)

		return 0;



	uV = regulator_get_voltage(supply);
@@ -628,7 +628,12 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, 
	if (uV == 0)

		return 0;



	/* Configured value must be equal or greater to actual voltage */

	switch (pctl->desc->io_bias_cfg_variant) {

	case BIAS_VOLTAGE_GRP_CONFIG:

		/*

		 * Configured value must be equal or greater to actual

		 * voltage.

		 */

		if (uV <= 1800000)

			val = 0x0; /* 1.8V */

		else if (uV <= 2500000)
@@ -645,8 +650,10 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, 
		reg = readl(pctl->membase + sunxi_grp_config_reg(pin));

		reg &= ~IO_BIAS_MASK;

		writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin));



		return 0;

	default:

		return -EINVAL;

	}

}



static int sunxi_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)

drivers/pinctrl/sunxi/pinctrl-sunxi.h

+10 −1
Original line number Diff line number Diff line
@@ -95,6 +95,15 @@ 
#define PINCTRL_SUN7I_A20	BIT(7)

#define PINCTRL_SUN8I_R40	BIT(8)



enum sunxi_desc_bias_voltage {

	BIAS_VOLTAGE_NONE,

	/*

	 * Bias voltage configuration is done through

	 * Pn_GRP_CONFIG registers, as seen on A80 SoC.

	 */

	BIAS_VOLTAGE_GRP_CONFIG,

};



struct sunxi_desc_function {

	unsigned long	variant;

	const char	*name;
@@ -117,7 +126,7 @@ struct sunxi_pinctrl_desc { 
	const unsigned int		*irq_bank_map;

	bool				irq_read_needs_mux;

	bool				disable_strict_mode;

	bool				has_io_bias_cfg;

	enum sunxi_desc_bias_voltage	io_bias_cfg_variant;

};



struct sunxi_pinctrl_function {