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Commit f6dbbff4 authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Alexandre TORGUE
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ARM: dts: stm32f429: add LSI and LSE clocks



This patch adds lsi / lse oscillators. These clocks can be use by
RTC clocks.
The clock drivers needs to disable the power domain write protection using
syscon / regmap to enable these clocks.

Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
parent ed75bf33
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+18 −0
Original line number Original line Diff line number Diff line
@@ -56,6 +56,18 @@
			compatible = "fixed-clock";
			compatible = "fixed-clock";
			clock-frequency = <0>;
			clock-frequency = <0>;
		};
		};

		clk-lse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		clk-lsi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32000>;
		};
	};
	};


	soc {
	soc {
@@ -189,6 +201,11 @@
			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
		};
		};


		pwrcfg: power-config@40007000 {
			compatible = "syscon";
			reg = <0x40007000 0x400>;
		};

		pin-controller {
		pin-controller {
			#address-cells = <1>;
			#address-cells = <1>;
			#size-cells = <1>;
			#size-cells = <1>;
@@ -346,6 +363,7 @@
			compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
			compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
			reg = <0x40023800 0x400>;
			reg = <0x40023800 0x400>;
			clocks = <&clk_hse>;
			clocks = <&clk_hse>;
			st,syscfg = <&pwrcfg>;
		};
		};


		dma1: dma-controller@40026000 {
		dma1: dma-controller@40026000 {