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Commit f6a7053d authored by Linus Walleij's avatar Linus Walleij
Browse files

gpio: zynq: Pass irqchip when adding gpiochip 



We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190809132649.25176-1-linus.walleij@linaro.org
parent f4e9bcc0

drivers/gpio/gpio-zynq.c

+21 −16
Original line number Diff line number Diff line
@@ -830,6 +830,7 @@ static int zynq_gpio_probe(struct platform_device *pdev) 
	int ret, bank_num;

	struct zynq_gpio *gpio;

	struct gpio_chip *chip;

	struct gpio_irq_chip *girq;

	const struct of_device_id *match;



	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
@@ -885,34 +886,38 @@ static int zynq_gpio_probe(struct platform_device *pdev) 
	if (ret < 0)

		goto err_pm_dis;



	/* report a bug if gpio chip registration fails */

	ret = gpiochip_add_data(chip, gpio);

	if (ret) {

		dev_err(&pdev->dev, "Failed to add gpio chip\n");

		goto err_pm_put;

	}



	/* disable interrupts for all banks */

	for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++)

		writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +

			       ZYNQ_GPIO_INTDIS_OFFSET(bank_num));



	ret = gpiochip_irqchip_add(chip, &zynq_gpio_edge_irqchip, 0,

				   handle_level_irq, IRQ_TYPE_NONE);

	if (ret) {

		dev_err(&pdev->dev, "Failed to add irq chip\n");

		goto err_rm_gpiochip;

	/* Set up the GPIO irqchip */

	girq = &chip->irq;

	girq->chip = &zynq_gpio_edge_irqchip;

	girq->parent_handler = zynq_gpio_irqhandler;

	girq->num_parents = 1;

	girq->parents = devm_kcalloc(&pdev->dev, 1,

				     sizeof(*girq->parents),

				     GFP_KERNEL);

	if (!girq->parents) {

		ret = -ENOMEM;

		goto err_pm_put;

	}

	girq->parents[0] = gpio->irq;

	girq->default_type = IRQ_TYPE_NONE;

	girq->handler = handle_level_irq;



	gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq,

				     zynq_gpio_irqhandler);

	/* report a bug if gpio chip registration fails */

	ret = gpiochip_add_data(chip, gpio);

	if (ret) {

		dev_err(&pdev->dev, "Failed to add gpio chip\n");

		goto err_pm_put;

	}



	pm_runtime_put(&pdev->dev);



	return 0;



err_rm_gpiochip:

	gpiochip_remove(chip);

err_pm_put:

	pm_runtime_put(&pdev->dev);

err_pm_dis: