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Commit f64111eb authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Emilio López
Browse files

clk: sunxi: add clock-output-names dt property support 



sunxi clock drivers use dt node name as clock name, but clock
nodes should be named clk@X, so the names would be the same.
Let the drivers read clock names from dt clock-output-names
property.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarEmilio López <emilio@elopez.com.ar>
parent 38dbfb59

drivers/clk/sunxi/clk-sunxi.c

+6 −0
Original line number Diff line number Diff line
@@ -51,6 +51,8 @@ static void __init sun4i_osc_clk_setup(struct device_node *node) 
	if (!gate)

		goto err_free_fixed;



	of_property_read_string(node, "clock-output-names", &clk_name);



	/* set up gate and fixed rate properties */

	gate->reg = of_iomap(node, 0);

	gate->bit_idx = SUNXI_OSC24M_GATE;
@@ -601,6 +603,8 @@ static void __init sunxi_mux_clk_setup(struct device_node *node, 
	       (parents[i] = of_clk_get_parent_name(node, i)) != NULL)

		i++;



	of_property_read_string(node, "clock-output-names", &clk_name);



	clk = clk_register_mux(NULL, clk_name, parents, i,

			       CLK_SET_RATE_NO_REPARENT, reg,

			       data->shift, SUNXI_MUX_GATE_WIDTH,
@@ -660,6 +664,8 @@ static void __init sunxi_divider_clk_setup(struct device_node *node, 


	clk_parent = of_clk_get_parent_name(node, 0);



	of_property_read_string(node, "clock-output-names", &clk_name);



	clk = clk_register_divider(NULL, clk_name, clk_parent, 0,

				   reg, data->shift, data->width,

				   data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0,