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Commit f62264a7 authored by Mao Jinlong's avatar Mao Jinlong Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Disable tpdm ddr for lahaina 

Disable tpdm ddr to avoid register access issue.

Change-Id: Ie7a0922f3d7b09d2c75005d5393576dd424a0e2a
parent f0227e9d

qcom/lahaina-coresight.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -2433,6 +2433,7 @@ 
		clocks = <&clock_aop QDSS_CLK>;

		clock-names = "apb_pclk";



		status = "disabled";

		qcom,msr-fix-req;



		out-ports {