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Commit f5eaffcc authored by Ken Wang's avatar Ken Wang Committed by Alex Deucher
Browse files

drm/amdgpu: Add common golden settings for GFX9 



Signed-off-by: default avatarKen Wang <Ken.Wang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1ec9b0af

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+9 −0
Original line number Diff line number Diff line
@@ -207,6 +207,12 @@ static const u32 golden_settings_gc_9_1_rv1[] = 
	SOC15_REG_OFFSET(GC, 0, mmTD_CNTL), 0x01bd9f33, 0x00000800

};



static const u32 golden_settings_gc_9_x_common[] =

{

	SOC15_REG_OFFSET(GC, 0, mmGRBM_CAM_INDEX), 0xffffffff, 0x00000000,

	SOC15_REG_OFFSET(GC, 0, mmGRBM_CAM_DATA), 0xffffffff, 0x2544c382

};



#define VEGA10_GB_ADDR_CONFIG_GOLDEN 0x2a114042

#define RAVEN_GB_ADDR_CONFIG_GOLDEN 0x24000042
@@ -242,6 +248,9 @@ static void gfx_v9_0_init_golden_registers(struct amdgpu_device *adev) 
	default:

		break;

	}



	amdgpu_program_register_sequence(adev, golden_settings_gc_9_x_common,

					(const u32)ARRAY_SIZE(golden_settings_gc_9_x_common));

}



static void gfx_v9_0_scratch_init(struct amdgpu_device *adev)