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Commit f5ce9f3c authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: add SW_USE_I2C_REG request. 



[Description]
This is for DC_I2c arbitration use between HW use/SW use and DMCU use.

Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8dea4960

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

+5 −2
Original line number Diff line number Diff line
@@ -268,6 +268,8 @@ static bool setup_engine( 
	struct dce_i2c_hw *dce_i2c_hw)

{

	uint32_t i2c_setup_limit = I2C_SETUP_TIME_LIMIT_DCE;

	/* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/

	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1);



	if (dce_i2c_hw->setup_limit != 0)

		i2c_setup_limit = dce_i2c_hw->setup_limit;
@@ -322,8 +324,6 @@ static void release_engine( 


	set_speed(dce_i2c_hw, dce_i2c_hw->original_speed);



	/* Release I2C */

	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_DONE_USING_I2C_REG, 1);



	/* Reset HW engine */

	{
@@ -343,6 +343,9 @@ static void release_engine( 
	/* HW I2c engine - clock gating feature */

	if (!dce_i2c_hw->engine_keep_power_up_count)

		REG_UPDATE_N(SETUP, 1, FN(SETUP, DC_I2C_DDC1_ENABLE), 0);

	/* Release I2C after reset, so HW or DMCU could use it */

	REG_UPDATE_2(DC_I2C_ARBITRATION, DC_I2C_SW_DONE_USING_I2C_REG, 1,

		DC_I2C_SW_USE_I2C_REG_REQ, 0);



}

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

+3 −0
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ enum { 
	I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_SEL, mask_sh),\

	I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_TRANSACTION_DELAY, mask_sh),\

	I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_BYTE_DELAY, mask_sh),\

	I2C_SF(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, mask_sh),\

	I2C_SF(DC_I2C_ARBITRATION, DC_I2C_SW_DONE_USING_I2C_REG, mask_sh),\

	I2C_SF(DC_I2C_ARBITRATION, DC_I2C_NO_QUEUED_SW_GO, mask_sh),\

	I2C_SF(DC_I2C_ARBITRATION, DC_I2C_SW_PRIORITY, mask_sh),\
@@ -146,6 +147,7 @@ struct dce_i2c_shift { 
	uint8_t DC_I2C_DDC1_INTRA_TRANSACTION_DELAY;

	uint8_t DC_I2C_DDC1_INTRA_BYTE_DELAY;

	uint8_t DC_I2C_SW_DONE_USING_I2C_REG;

	uint8_t DC_I2C_SW_USE_I2C_REG_REQ;

	uint8_t DC_I2C_NO_QUEUED_SW_GO;

	uint8_t DC_I2C_SW_PRIORITY;

	uint8_t DC_I2C_SOFT_RESET;
@@ -184,6 +186,7 @@ struct dce_i2c_mask { 
	uint32_t DC_I2C_DDC1_INTRA_TRANSACTION_DELAY;

	uint32_t DC_I2C_DDC1_INTRA_BYTE_DELAY;

	uint32_t DC_I2C_SW_DONE_USING_I2C_REG;

	uint32_t DC_I2C_SW_USE_I2C_REG_REQ;

	uint32_t DC_I2C_NO_QUEUED_SW_GO;

	uint32_t DC_I2C_SW_PRIORITY;

	uint32_t DC_I2C_SOFT_RESET;