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Commit f5742ec3 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
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drm/amd/powerplay: correct power reading on fiji



Set sampling period as 500ms to provide a smooth power
reading output. Also, correct the register for power
reading.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 8f2bf884
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+3 −3
Original line number Diff line number Diff line
@@ -3491,14 +3491,14 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query)

	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart);
	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
							ixSMU_PM_STATUS_94, 0);
							ixSMU_PM_STATUS_95, 0);

	for (i = 0; i < 10; i++) {
		mdelay(1);
		mdelay(500);
		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample);
		tmp = cgs_read_ind_register(hwmgr->device,
						CGS_IND_REG__SMC,
						ixSMU_PM_STATUS_94);
						ixSMU_PM_STATUS_95);
		if (tmp != 0)
			break;
	}