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Commit f5500f38 authored by Maarten Lankhorst's avatar Maarten Lankhorst
Browse files

Merge remote-tracking branch 'drm/drm-next' into drm-misc-next



Pick up rc3 and rc4 and the merges from the other branches,
we're a bit out of date.

Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parents 527e4ca3 2454fcea
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+15 −4
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required properties:
- compatible : Shall contain one of
  - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
  - "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders
  - "renesas,r8a774a1-lvds" for R8A774A1 (RZ/G2M) compatible LVDS encoders
  - "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
  - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
  - "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
@@ -45,14 +46,24 @@ OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.

Each port shall have a single endpoint.

Optional properties:

- renesas,companion : phandle to the companion LVDS encoder. This property is
  mandatory for the first LVDS encoder on D3 and E3 SoCs, and shall point to
  the second encoder to be used as a companion in dual-link mode. It shall not
  be set for any other LVDS encoder.


Example:

	lvds0: lvds@feb90000 {
		compatible = "renesas,r8a7790-lvds";
		reg = <0 0xfeb90000 0 0x1c>;
		clocks = <&cpg CPG_MOD 726>;
		resets = <&cpg 726>;
		compatible = "renesas,r8a77990-lvds";
		reg = <0 0xfeb90000 0 0x20>;
		clocks = <&cpg CPG_MOD 727>;
		power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
		resets = <&cpg 727>;

		renesas,companion = <&lvds1>;

		ports {
			#address-cells = <1>;
+6 −0
Original line number Diff line number Diff line
@@ -28,6 +28,12 @@ Optional video port nodes:
- port@1: Second LVDS input port
- port@3: Second digital CMOS/TTL parallel output

The device can operate in single-link mode or dual-link mode. In single-link
mode, all pixels are received on port@0, and port@1 shall not contain any
endpoint. In dual-link mode, even-numbered pixels are received on port@0 and
odd-numbered pixels on port@1, and both port@0 and port@1 shall contain
endpoints.

Example:
--------

+2 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required Properties:
    - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU
    - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
    - "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU
    - "renesas,du-r8a774a1" for R8A774A1 (RZ/G2M) compatible DU
    - "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU
    - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
    - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
@@ -58,6 +59,7 @@ corresponding to each DU output.
 R8A7744 (RZ/G1N)       DPAD 0         LVDS 0         -              -
 R8A7745 (RZ/G1E)       DPAD 0         DPAD 1         -              -
 R8A77470 (RZ/G1C)      DPAD 0         DPAD 1         LVDS 0         -
 R8A774A1 (RZ/G2M)      DPAD 0         HDMI 0         LVDS 0         -
 R8A774C0 (RZ/G2E)      DPAD 0         LVDS 0         LVDS 1         -
 R8A7779 (R-Car H1)     DPAD 0         DPAD 1         -              -
 R8A7790 (R-Car H2)     DPAD 0         LVDS 0         LVDS 1         -
+22 −2
Original line number Diff line number Diff line
@@ -37,10 +37,10 @@ Buffer Objects
PRIME Buffer Sharing
--------------------

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
   :doc: PRIME Buffer Sharing

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
   :internal:

MMU Notifier
@@ -70,6 +70,26 @@ Interrupt Handling
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
   :internal:

AMDGPU XGMI Support
===================

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
   :doc: AMDGPU XGMI Support

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
   :internal:

AMDGPU RAS debugfs control interface
====================================

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
   :doc: AMDGPU RAS debugfs control interface


.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
   :internal:


GPU Power/Thermal Controls and Monitoring
=========================================

+4 −3
Original line number Diff line number Diff line
@@ -27,10 +27,11 @@ config DRM_AMDGPU_CIK
config DRM_AMDGPU_USERPTR
	bool "Always enable userptr write support"
	depends on DRM_AMDGPU
	select MMU_NOTIFIER
	depends on ARCH_HAS_HMM
	select HMM_MIRROR
	help
	  This option selects CONFIG_MMU_NOTIFIER if it isn't already
	  selected to enabled full userptr support.
	  This option selects CONFIG_HMM and CONFIG_HMM_MIRROR if it
	  isn't already selected to enabled full userptr support.

config DRM_AMDGPU_GART_DEBUGFS
	bool "Allow GART access through debugfs"
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