Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f524f829 authored by Dan Murphy's avatar Dan Murphy Committed by Marc Kleine-Budde
Browse files

can: m_can: Create a m_can platform framework



Create a m_can platform framework that peripheral
devices can register to and use common code and register sets.
The peripheral devices may provide read/write and configuration
support of the IP.

Acked-by: default avatarWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: default avatarDan Murphy <dmurphy@ti.com>
Acked-by: default avatarFaiz Abbas <faiz_abbas@ti.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 69652195
Loading
Loading
Loading
Loading
+11 −2
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only
config CAN_M_CAN
	tristate "Bosch M_CAN support"
	---help---
	  Say Y here if you want support for Bosch M_CAN controller framework.
	  This is common support for devices that embed the Bosch M_CAN IP.

config CAN_M_CAN_PLATFORM
	tristate "Bosch M_CAN support for io-mapped devices"
	depends on HAS_IOMEM
	tristate "Bosch M_CAN devices"
	depends on CAN_M_CAN
	---help---
	  Say Y here if you want to support for Bosch M_CAN controller.
	  Say Y here if you want support for IO Mapped Bosch M_CAN controller.
	  This support is for devices that have the Bosch M_CAN controller
	  IP embedded into the device and the IP is IO Mapped to the processor.
+1 −0
Original line number Diff line number Diff line
@@ -4,3 +4,4 @@
#

obj-$(CONFIG_CAN_M_CAN) += m_can.o
obj-$(CONFIG_CAN_M_CAN_PLATFORM) += m_can_platform.o
+380 −343

File changed.

Preview size limit exceeded, changes collapsed.

+110 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 */
/* CAN bus driver for Bosch M_CAN controller
 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
 */

#ifndef _CAN_M_CAN_H_
#define _CAN_M_CAN_H_

#include <linux/can/core.h>
#include <linux/can/led.h>
#include <linux/completion.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/freezer.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pm_runtime.h>
#include <linux/iopoll.h>
#include <linux/can/dev.h>
#include <linux/pinctrl/consumer.h>

/* m_can lec values */
enum m_can_lec_type {
	LEC_NO_ERROR = 0,
	LEC_STUFF_ERROR,
	LEC_FORM_ERROR,
	LEC_ACK_ERROR,
	LEC_BIT1_ERROR,
	LEC_BIT0_ERROR,
	LEC_CRC_ERROR,
	LEC_UNUSED,
};

enum m_can_mram_cfg {
	MRAM_SIDF = 0,
	MRAM_XIDF,
	MRAM_RXF0,
	MRAM_RXF1,
	MRAM_RXB,
	MRAM_TXE,
	MRAM_TXB,
	MRAM_CFG_NUM,
};

/* address offset and element number for each FIFO/Buffer in the Message RAM */
struct mram_cfg {
	u16 off;
	u8  num;
};

struct m_can_priv;
struct m_can_ops {
	/* Device specific call backs */
	int (*clear_interrupts)(struct m_can_priv *m_can_class);
	u32 (*read_reg)(struct m_can_priv *m_can_class, int reg);
	int (*write_reg)(struct m_can_priv *m_can_class, int reg, int val);
	u32 (*read_fifo)(struct m_can_priv *m_can_class, int addr_offset);
	int (*write_fifo)(struct m_can_priv *m_can_class, int addr_offset,
			  int val);
	int (*init)(struct m_can_priv *m_can_class);
};

struct m_can_priv {
	struct can_priv can;
	struct napi_struct napi;
	struct net_device *net;
	struct device *dev;
	struct clk *hclk;
	struct clk *cclk;

	struct workqueue_struct *tx_wq;
	struct work_struct tx_work;
	struct sk_buff *tx_skb;

	struct can_bittiming_const *bit_timing;
	struct can_bittiming_const *data_timing;

	struct m_can_ops *ops;

	void *device_data;

	int version;
	int freq;
	u32 irqstatus;

	int pm_clock_support;
	int is_peripheral;

	struct mram_cfg mcfg[MRAM_CFG_NUM];
};

struct m_can_priv *m_can_class_allocate_dev(struct device *dev);
int m_can_class_register(struct m_can_priv *m_can_dev);
void m_can_class_unregister(struct m_can_priv *m_can_dev);
int m_can_class_get_clocks(struct m_can_priv *m_can_dev);
void m_can_init_ram(struct m_can_priv *priv);
void m_can_config_endisable(struct m_can_priv *priv, bool enable);

int m_can_class_suspend(struct device *dev);
int m_can_class_resume(struct device *dev);
#endif	/* _CAN_M_H_ */
+202 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
// IOMapped CAN bus driver for Bosch M_CAN controller
// Copyright (C) 2014 Freescale Semiconductor, Inc.
//	Dong Aisheng <b29396@freescale.com>
//
// Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/

#include <linux/platform_device.h>

#include "m_can.h"

struct m_can_plat_priv {
	void __iomem *base;
	void __iomem *mram_base;
};

static u32 iomap_read_reg(struct m_can_priv *cdev, int reg)
{
	struct m_can_plat_priv *priv =
			(struct m_can_plat_priv *)cdev->device_data;

	return readl(priv->base + reg);
}

static u32 iomap_read_fifo(struct m_can_priv *cdev, int offset)
{
	struct m_can_plat_priv *priv =
			(struct m_can_plat_priv *)cdev->device_data;

	return readl(priv->mram_base + offset);
}

static int iomap_write_reg(struct m_can_priv *cdev, int reg, int val)
{
	struct m_can_plat_priv *priv =
			(struct m_can_plat_priv *)cdev->device_data;

	writel(val, priv->base + reg);

	return 0;
}

static int iomap_write_fifo(struct m_can_priv *cdev, int offset, int val)
{
	struct m_can_plat_priv *priv =
			(struct m_can_plat_priv *)cdev->device_data;

	writel(val, priv->mram_base + offset);

	return 0;
}

static struct m_can_ops m_can_plat_ops = {
	.read_reg = iomap_read_reg,
	.write_reg = iomap_write_reg,
	.write_fifo = iomap_write_fifo,
	.read_fifo = iomap_read_fifo,
};

static int m_can_plat_probe(struct platform_device *pdev)
{
	struct m_can_priv *mcan_class;
	struct m_can_plat_priv *priv;
	struct resource *res;
	void __iomem *addr;
	void __iomem *mram_addr;
	int irq, ret = 0;

	mcan_class = m_can_class_allocate_dev(&pdev->dev);
	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	mcan_class->device_data = priv;

	m_can_class_get_clocks(mcan_class);

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");
	addr = devm_ioremap_resource(&pdev->dev, res);
	irq = platform_get_irq_byname(pdev, "int0");
	if (IS_ERR(addr) || irq < 0) {
		ret = -EINVAL;
		goto failed_ret;
	}

	/* message ram could be shared */
	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");
	if (!res) {
		ret = -ENODEV;
		goto failed_ret;
	}

	mram_addr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	if (!mram_addr) {
		ret = -ENOMEM;
		goto failed_ret;
	}

	priv->base = addr;
	priv->mram_base = mram_addr;

	mcan_class->net->irq = irq;
	mcan_class->pm_clock_support = 1;
	mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk);
	mcan_class->dev = &pdev->dev;

	mcan_class->ops = &m_can_plat_ops;

	mcan_class->is_peripheral = false;

	platform_set_drvdata(pdev, mcan_class->dev);

	m_can_init_ram(mcan_class);

	ret = m_can_class_register(mcan_class);

failed_ret:
	return ret;
}

static __maybe_unused int m_can_suspend(struct device *dev)
{
	return m_can_class_suspend(dev);
}

static __maybe_unused int m_can_resume(struct device *dev)
{
	return m_can_class_resume(dev);
}

static int m_can_plat_remove(struct platform_device *pdev)
{
	struct net_device *dev = platform_get_drvdata(pdev);
	struct m_can_priv *mcan_class = netdev_priv(dev);

	m_can_class_unregister(mcan_class);

	platform_set_drvdata(pdev, NULL);

	return 0;
}

static int __maybe_unused m_can_runtime_suspend(struct device *dev)
{
	struct net_device *ndev = dev_get_drvdata(dev);
	struct m_can_priv *mcan_class = netdev_priv(ndev);

	m_can_class_suspend(dev);

	clk_disable_unprepare(mcan_class->cclk);
	clk_disable_unprepare(mcan_class->hclk);

	return 0;
}

static int __maybe_unused m_can_runtime_resume(struct device *dev)
{
	struct net_device *ndev = dev_get_drvdata(dev);
	struct m_can_priv *mcan_class = netdev_priv(ndev);
	int err;

	err = clk_prepare_enable(mcan_class->hclk);
	if (err)
		return err;

	err = clk_prepare_enable(mcan_class->cclk);
	if (err)
		clk_disable_unprepare(mcan_class->hclk);

	m_can_class_resume(dev);

	return err;
}

static const struct dev_pm_ops m_can_pmops = {
	SET_RUNTIME_PM_OPS(m_can_runtime_suspend,
			   m_can_runtime_resume, NULL)
	SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)
};

static const struct of_device_id m_can_of_table[] = {
	{ .compatible = "bosch,m_can", .data = NULL },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, m_can_of_table);

static struct platform_driver m_can_plat_driver = {
	.driver = {
		.name = KBUILD_MODNAME,
		.of_match_table = m_can_of_table,
		.pm     = &m_can_pmops,
	},
	.probe = m_can_plat_probe,
	.remove = m_can_plat_remove,
};

module_platform_driver(m_can_plat_driver);

MODULE_AUTHOR("Dong Aisheng <b29396@freescale.com>");
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("M_CAN driver for IO Mapped Bosch controllers");