MIPS: SEAD3: Enable LL/SC.



All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 631b0af9

arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -28,7 +28,7 @@
		/* #define cpu_has_prefetch ? */
		#define cpu_has_mcheck 1
		/* #define cpu_has_ejtag ? */
		#define cpu_has_llsc 0
		#define cpu_has_llsc 1
		/* #define cpu_has_vtag_icache ? */
		/* #define cpu_has_dc_aliases ? */
		/* #define cpu_has_ic_fills_f_dc ? */