Loading qcom/shima.dtsi +0 −13 Original line number Diff line number Diff line Loading @@ -3897,7 +3897,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3907,7 +3906,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3916,7 +3914,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3925,7 +3922,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3934,7 +3930,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3944,7 +3939,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3954,7 +3948,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3963,7 +3956,6 @@ clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3972,7 +3964,6 @@ clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_GFX_LEVEL>; vdd_parent-supply = <&VDD_GFX_LEVEL>; qcom,retain-regs; qcom,skip-disable-before-sw-enable; status = "ok"; Loading @@ -3983,7 +3974,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3992,7 +3982,6 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -4002,7 +3991,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -4011,7 +3999,6 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading Loading
qcom/shima.dtsi +0 −13 Original line number Diff line number Diff line Loading @@ -3897,7 +3897,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3907,7 +3906,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3916,7 +3914,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3925,7 +3922,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3934,7 +3930,6 @@ clocks = <&gcc GCC_CAMERA_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3944,7 +3939,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3954,7 +3948,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3963,7 +3956,6 @@ clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3972,7 +3964,6 @@ clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_GFX_LEVEL>; vdd_parent-supply = <&VDD_GFX_LEVEL>; qcom,retain-regs; qcom,skip-disable-before-sw-enable; status = "ok"; Loading @@ -3983,7 +3974,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -3992,7 +3982,6 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -4002,7 +3991,6 @@ clock-names = "ahb_clk"; qcom,support-hw-trigger; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading @@ -4011,7 +3999,6 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; clock-names = "ahb_clk"; parent-supply = <&VDD_CX_LEVEL>; vdd_parent-supply = <&VDD_CX_LEVEL>; qcom,retain-regs; status = "ok"; }; Loading