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Commit f3aa095a authored by Dmitry Bezrukov's avatar Dmitry Bezrukov Committed by David S. Miller
Browse files

net: usb: aqc111: Various callbacks implementation



Reset, stop callbacks, driver unbind callback.
More register defines required for these callbacks.
Add helpers to read/write 16bit values

Signed-off-by: default avatarDmitry Bezrukov <dmitry.bezrukov@aquantia.com>
Signed-off-by: default avatarIgor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 619fcb44
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+76 −0
Original line number Diff line number Diff line
@@ -48,6 +48,17 @@ static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,
	return ret;
}

static int aqc111_read16_cmd(struct usbnet *dev, u8 cmd, u16 value,
			     u16 index, u16 *data)
{
	int ret = 0;

	ret = aqc111_read_cmd(dev, cmd, value, index, sizeof(*data), data);
	le16_to_cpus(data);

	return ret;
}

static int __aqc111_write_cmd(struct usbnet *dev, u8 cmd, u8 reqtype,
			      u16 value, u16 index, u16 size, const void *data)
{
@@ -106,6 +117,26 @@ static int aqc111_write_cmd(struct usbnet *dev, u8 cmd, u16 value,
	return ret;
}

static int aqc111_write16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
				   u16 index, u16 *data)
{
	u16 tmp = *data;

	cpu_to_le16s(&tmp);

	return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp);
}

static int aqc111_write16_cmd(struct usbnet *dev, u8 cmd, u16 value,
			      u16 index, u16 *data)
{
	u16 tmp = *data;

	cpu_to_le16s(&tmp);

	return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp);
}

static const struct net_device_ops aqc111_netdev_ops = {
	.ndo_open		= usbnet_open,
	.ndo_stop		= usbnet_stop,
@@ -137,12 +168,57 @@ static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)

static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf)
{
	u16 reg16;

	/* Force bz */
	reg16 = SFR_PHYPWR_RSTCTL_BZ;
	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
				2, &reg16);
	reg16 = 0;
	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
				2, &reg16);
}

static int aqc111_reset(struct usbnet *dev)
{
	u8 reg8 = 0;

	reg8 = 0xFF;
	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, &reg8);

	reg8 = 0x0;
	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, &reg8);

	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
	reg8 &= ~(SFR_MONITOR_MODE_EPHYRW | SFR_MONITOR_MODE_RWLC |
		  SFR_MONITOR_MODE_RWMP | SFR_MONITOR_MODE_RWWF |
		  SFR_MONITOR_MODE_RW_FLAG);
	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);

	return 0;
}

static int aqc111_stop(struct usbnet *dev)
{
	u16 reg16 = 0;

	aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
			  2, &reg16);
	reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
			   2, &reg16);
	reg16 = 0;
	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);

	return 0;
}

static const struct driver_info aqc111_info = {
	.description	= "Aquantia AQtion USB to 5GbE Controller",
	.bind		= aqc111_bind,
	.unbind		= aqc111_unbind,
	.reset		= aqc111_reset,
	.stop		= aqc111_stop,
};

#define AQC111_USB_ETH_DEV(vid, pid, table) \
+101 −0
Original line number Diff line number Diff line
@@ -10,9 +10,110 @@
#ifndef __LINUX_USBNET_AQC111_H
#define __LINUX_USBNET_AQC111_H

#define AQ_ACCESS_MAC			0x01
#define AQ_PHY_POWER			0x31

#define AQ_USB_PHY_SET_TIMEOUT		10000
#define AQ_USB_SET_TIMEOUT		4000

/* SFR Reg. ********************************************/

#define SFR_GENERAL_STATUS		0x03
#define SFR_CHIP_STATUS			0x05
#define SFR_RX_CTL			0x0B
	#define SFR_RX_CTL_TXPADCRC		0x0400
	#define SFR_RX_CTL_IPE			0x0200
	#define SFR_RX_CTL_DROPCRCERR		0x0100
	#define SFR_RX_CTL_START		0x0080
	#define SFR_RX_CTL_RF_WAK		0x0040
	#define SFR_RX_CTL_AP			0x0020
	#define SFR_RX_CTL_AM			0x0010
	#define SFR_RX_CTL_AB			0x0008
	#define SFR_RX_CTL_AMALL		0x0002
	#define SFR_RX_CTL_PRO			0x0001
	#define SFR_RX_CTL_STOP			0x0000
#define SFR_INTER_PACKET_GAP_0		0x0D
#define SFR_NODE_ID			0x10
#define SFR_MULTI_FILTER_ARRY		0x16
#define SFR_MEDIUM_STATUS_MODE		0x22
	#define SFR_MEDIUM_XGMIIMODE		0x0001
	#define SFR_MEDIUM_FULL_DUPLEX		0x0002
	#define SFR_MEDIUM_RXFLOW_CTRLEN	0x0010
	#define SFR_MEDIUM_TXFLOW_CTRLEN	0x0020
	#define SFR_MEDIUM_JUMBO_EN		0x0040
	#define SFR_MEDIUM_RECEIVE_EN		0x0100
#define SFR_MONITOR_MODE		0x24
	#define SFR_MONITOR_MODE_EPHYRW		0x01
	#define SFR_MONITOR_MODE_RWLC		0x02
	#define SFR_MONITOR_MODE_RWMP		0x04
	#define SFR_MONITOR_MODE_RWWF		0x08
	#define SFR_MONITOR_MODE_RW_FLAG	0x10
	#define SFR_MONITOR_MODE_PMEPOL		0x20
	#define SFR_MONITOR_MODE_PMETYPE	0x40
#define SFR_PHYPWR_RSTCTL		0x26
	#define SFR_PHYPWR_RSTCTL_BZ		0x0010
	#define SFR_PHYPWR_RSTCTL_IPRL		0x0020
#define SFR_VLAN_ID_ADDRESS		0x2A
#define SFR_VLAN_ID_CONTROL		0x2B
	#define SFR_VLAN_CONTROL_WE		0x0001
	#define SFR_VLAN_CONTROL_RD		0x0002
	#define SFR_VLAN_CONTROL_VSO		0x0010
	#define SFR_VLAN_CONTROL_VFE		0x0020
#define SFR_VLAN_ID_DATA0		0x2C
#define SFR_VLAN_ID_DATA1		0x2D
#define SFR_RX_BULKIN_QCTRL		0x2E
	#define SFR_RX_BULKIN_QCTRL_TIME	0x01
	#define SFR_RX_BULKIN_QCTRL_IFG		0x02
	#define SFR_RX_BULKIN_QCTRL_SIZE	0x04
#define SFR_RX_BULKIN_QTIMR_LOW		0x2F
#define SFR_RX_BULKIN_QTIMR_HIGH	0x30
#define SFR_RX_BULKIN_QSIZE		0x31
#define SFR_RX_BULKIN_QIFG		0x32
#define SFR_RXCOE_CTL			0x34
	#define SFR_RXCOE_IP			0x01
	#define SFR_RXCOE_TCP			0x02
	#define SFR_RXCOE_UDP			0x04
	#define SFR_RXCOE_ICMP			0x08
	#define SFR_RXCOE_IGMP			0x10
	#define SFR_RXCOE_TCPV6			0x20
	#define SFR_RXCOE_UDPV6			0x40
	#define SFR_RXCOE_ICMV6			0x80
#define SFR_TXCOE_CTL			0x35
	#define SFR_TXCOE_IP			0x01
	#define SFR_TXCOE_TCP			0x02
	#define SFR_TXCOE_UDP			0x04
	#define SFR_TXCOE_ICMP			0x08
	#define SFR_TXCOE_IGMP			0x10
	#define SFR_TXCOE_TCPV6			0x20
	#define SFR_TXCOE_UDPV6			0x40
	#define SFR_TXCOE_ICMV6			0x80
#define SFR_BM_INT_MASK			0x41
#define SFR_BMRX_DMA_CONTROL		0x43
	#define SFR_BMRX_DMA_EN			0x80
#define SFR_BMTX_DMA_CONTROL		0x46
#define SFR_PAUSE_WATERLVL_LOW		0x54
#define SFR_PAUSE_WATERLVL_HIGH		0x55
#define SFR_ARC_CTRL			0x9E
#define SFR_SWP_CTRL			0xB1
#define SFR_TX_PAUSE_RESEND_T		0xB2
#define SFR_ETH_MAC_PATH		0xB7
	#define SFR_RX_PATH_READY		0x01
#define SFR_BULK_OUT_CTRL		0xB9
	#define SFR_BULK_OUT_FLUSH_EN		0x01
	#define SFR_BULK_OUT_EFF_EN		0x02

static struct {
	unsigned char ctrl;
	unsigned char timer_l;
	unsigned char timer_h;
	unsigned char size;
	unsigned char ifg;
} AQC111_BULKIN_SIZE[] = {
	/* xHCI & EHCI & OHCI */
	{7, 0x00, 0x01, 0x1E, 0xFF},/* 10G, 5G, 2.5G, 1G */
	{7, 0xA0, 0x00, 0x14, 0x00},/* 100M */
	/* Jumbo packet */
	{7, 0x00, 0x01, 0x18, 0xFF},
};

#endif /* __LINUX_USBNET_AQC111_H */