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Commit f3a32436 authored by Breno Leitao's avatar Breno Leitao Committed by Greg Kroah-Hartman
Browse files

x86/bugs: Reset speculation control settings on init 



[ Upstream commit 0125acda7d76b943ca55811df40ed6ec0ecf670f ]

Currently, x86_spec_ctrl_base is read at boot time and speculative bits
are set if Kconfig items are enabled. For example, IBRS is enabled if
CONFIG_CPU_IBRS_ENTRY is configured, etc. These MSR bits are not cleared
if the mitigations are disabled.

This is a problem when kexec-ing a kernel that has the mitigation
disabled from a kernel that has the mitigation enabled. In this case,
the MSR bits are not cleared during the new kernel boot. As a result,
this might have some performance degradation that is hard to pinpoint.

This problem does not happen if the machine is (hard) rebooted because
the bit will be cleared by default.

  [ bp: Massage. ]

Suggested-by: default avatarPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: default avatarBreno Leitao <leitao@debian.org>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20221128153148.1129350-1-leitao@debian.org


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent c8157f67

arch/x86/include/asm/msr-index.h

+4 −0
Original line number Diff line number Diff line
@@ -50,6 +50,10 @@ 
#define SPEC_CTRL_RRSBA_DIS_S_SHIFT	6	   /* Disable RRSBA behavior */

#define SPEC_CTRL_RRSBA_DIS_S		BIT(SPEC_CTRL_RRSBA_DIS_S_SHIFT)



/* A mask for bits which the kernel toggles when controlling mitigations */

#define SPEC_CTRL_MITIGATIONS_MASK	(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD \

							| SPEC_CTRL_RRSBA_DIS_S)



#define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */

#define PRED_CMD_IBPB			BIT(0)	   /* Indirect Branch Prediction Barrier */

arch/x86/kernel/cpu/bugs.c

+9 −1
Original line number Diff line number Diff line
@@ -135,9 +135,17 @@ void __init check_bugs(void) 
	 * have unknown values. AMD64_LS_CFG MSR is cached in the early AMD

	 * init code as it is not enumerated and depends on the family.

	 */

	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))

	if (cpu_feature_enabled(X86_FEATURE_MSR_SPEC_CTRL)) {

		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);



		/*

		 * Previously running kernel (kexec), may have some controls

		 * turned ON. Clear them and let the mitigations setup below

		 * rediscover them based on configuration.

		 */

		x86_spec_ctrl_base &= ~SPEC_CTRL_MITIGATIONS_MASK;

	}



	/* Select the proper CPU mitigations before patching alternatives: */

	spectre_v1_select_mitigation();

	spectre_v2_select_mitigation();