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Commit f39a29bb authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Marc Zyngier
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dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU



This commit adds the Device Tree binding documentation for the Marvell
ICU interrupt controller, which collects wired interrupts from the
devices located into the CP110 hardware block of Marvell Armada 7K/8K,
and converts them into SPI interrupts in the GIC located in the AP
hardware block, using the GICP extension.

Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent 11f69da0
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Marvell ICU Interrupt Controller
--------------------------------

The Marvell ICU (Interrupt Consolidation Unit) controller is
responsible for collecting all wired-interrupt sources in the CP and
communicating them to the GIC in the AP, the unit translates interrupt
requests on input wires to MSG memory mapped transactions to the GIC.

Required properties:

- compatible: Should be "marvell,cp110-icu"

- reg: Should contain ICU registers location and length.

- #interrupt-cells: Specifies the number of cells needed to encode an
  interrupt source. The value shall be 3.

  The 1st cell is the group type of the ICU interrupt. Possible group
  types are:

   ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure
   ICU_GRP_SR  (0x1) : Shared peripheral interrupt, secure
   ICU_GRP_SEI (0x4) : System error interrupt
   ICU_GRP_REI (0x5) : RAM error interrupt

  The 2nd cell is the index of the interrupt in the ICU unit.

  The 3rd cell is the type of the interrupt. See arm,gic.txt for
  details.

- interrupt-controller: Identifies the node as an interrupt
  controller.

- msi-parent: Should point to the GICP controller, the GIC extension
  that allows to trigger interrupts using MSG memory mapped
  transactions.

Example:

icu: interrupt-controller@1e0000 {
	compatible = "marvell,cp110-icu";
	reg = <0x1e0000 0x10>;
	#interrupt-cells = <3>;
	interrupt-controller;
	msi-parent = <&gicp>;
};

usb3h0: usb3@500000 {
	interrupt-parent = <&icu>;
	interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
};