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Commit f36afdd0 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

arm64: dts: exynos: Move fixed-clocks out of soc 



The XXTI fixed-clock is the input to the SoC therefore it should not be
inside the soc node.  This also fixes DTC W=1 warning:

    arch/arm64/boot/dts/exynos/exynos7.dtsi:90.17-94.5:
        Warning (simple_bus_reg): /soc/xxti: missing or empty reg/ranges property

While moving, change the name of the xxti node to match the generic type
of device (following DeviceTree specification).

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 179a2802

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+7 −6
Original line number Diff line number Diff line
@@ -41,6 +41,13 @@ 
		interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;

	};



	xxti: clock {

		/* XXTI */

		compatible = "fixed-clock";

		clock-output-names = "oscclk";

		#clock-cells = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -260,12 +267,6 @@ 
			reg = <0x10000000 0x100>;

		};



		xxti: xxti {

			compatible = "fixed-clock";

			clock-output-names = "oscclk";

			#clock-cells = <0>;

		};



		cmu_top: clock-controller@10030000 {

			compatible = "samsung,exynos5433-cmu-top";

			reg = <0x10030000 0x1000>;

arch/arm64/boot/dts/exynos/exynos7.dtsi

+7 −6
Original line number Diff line number Diff line
@@ -38,6 +38,13 @@ 
				     <&cpu_atlas2>, <&cpu_atlas3>;

	};



	fin_pll: clock {

		/* XXTI */

		compatible = "fixed-clock";

		clock-output-names = "fin_pll";

		#clock-cells = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -87,12 +94,6 @@ 
			reg = <0x10000000 0x100>;

		};



		fin_pll: xxti {

			compatible = "fixed-clock";

			clock-output-names = "fin_pll";

			#clock-cells = <0>;

		};



		gic: interrupt-controller@11001000 {

			compatible = "arm,gic-400";

			#interrupt-cells = <3>;