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Commit f32452b8 authored by Saurabh Sahu's avatar Saurabh Sahu
Browse files

clk: qcom: gcc: Add support for camera and video clks for MONACO 



Add support for camera and video clks for clock clients to be able
to request for the clocks in MONACO. Also update the gpucc_pll0_out_odd
source to gpucc_pll0_out_even src for gfx clk src for MONACO.

Change-Id: I3b4efffb828e38f684051b7265e5481b0bce14e5
Signed-off-by: default avatarSaurabh Sahu <sausah@codeaurora.org>
parent 7d6f957e

drivers/clk/qcom/gcc-monaco.c

+1453 −313

File changed.

Preview size limit exceeded, changes collapsed.

drivers/clk/qcom/gpucc-monaco.c

+7 −7
Original line number Diff line number Diff line
@@ -162,12 +162,12 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { 
};



static const struct freq_tbl ftbl_gpu_cc_gx_gfx3d_clk_src[] = {

	F(310000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(470000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(583000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(700000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(900000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(1000000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),

	F(310000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	F(470000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	F(583000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	F(700000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	F(900000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	F(1010000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),

	{ }

};
@@ -194,7 +194,7 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src = { 
			[VDD_LOW_L1] = 583000000,

			[VDD_NOMINAL] = 700000000,

			[VDD_HIGH] = 900000000,

			[VDD_HIGH_L1] = 1000000000},

			[VDD_HIGH_L1] = 1010000000},

	},

};