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Commit f2d9bbc9 authored by Emily Deng's avatar Emily Deng Committed by Alex Deucher
Browse files

drm/amdgpu: Limit the max mc address to hole start 



For the vram_start is 0 case, the gart range will be from 0x0000FFFF00000000
to 0x0000FFFF1FFFFFFF, which will cause the engine hang.

So to avoid the hole, limit the max mc address to AMDGPU_GMC_HOLE_START.:wq

Signed-off-by: default avatarEmily Deng <Emily.Deng@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f9f97e3c

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

+4 −2
Original line number Diff line number Diff line
@@ -146,6 +146,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) 
{

	const uint64_t four_gb = 0x100000000ULL;

	u64 size_af, size_bf;

	/*To avoid the hole, limit the max mc address to AMDGPU_GMC_HOLE_START*/

	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1);



	mc->gart_size += adev->pm.smu_prv_buffer_size;
@@ -153,7 +155,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) 
	 * the GART base on a 4GB boundary as well.

	 */

	size_bf = mc->fb_start;

	size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb);

	size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);



	if (mc->gart_size > max(size_bf, size_af)) {

		dev_warn(adev->dev, "limiting GART\n");
@@ -164,7 +166,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) 
	    (size_af < mc->gart_size))

		mc->gart_start = 0;

	else

		mc->gart_start = mc->mc_mask - mc->gart_size + 1;

		mc->gart_start = max_mc_address - mc->gart_size + 1;



	mc->gart_start &= ~(four_gb - 1);

	mc->gart_end = mc->gart_start + mc->gart_size - 1;