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Commit f29511ee authored by Deepak Kumar's avatar Deepak Kumar
Browse files

msm: kgsl: Correct sequence of FAL register programming 



PMU expects FAL QACTIVE signal to be asserted first followed
by FAL10VETO. Correct this sequence as per latest recommendation.

Change-Id: Id9719377b22281830a84f0af534caf6507bfe797
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent 12007b0e

drivers/gpu/msm/adreno_a6xx_gmu.c

+1 −1
Original line number Diff line number Diff line
@@ -1316,9 +1316,9 @@ void a6xx_gmu_register_config(struct adreno_device *adreno_dev) 


	/* Vote veto for FAL10 feature if supported*/

	if (a6xx_core->veto_fal10) {

		gmu_core_regwrite(device, A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 0x1);

		gmu_core_regwrite(device,

			A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 0x1);

		gmu_core_regwrite(device, A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 0x1);

	}



	/* Turn on TCM retention */