Commit f258b44e authored Dec 09, 2011 by Tomoya MORINAGA Committed by Grant Likely Mar 09, 2012

spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control



This patch supports a spi mode setup and bit order setup by IO control.
    spi mode:     mode 0 to mode 3
    bit order:    LSB first, MSB first

Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

parent 7d05b3e8

drivers/spi/spi-topcliff-pch.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1434,6 +1434,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
		master->num_chipselect = PCH_MAX_CS;
		master->setup = pch_spi_setup;
		master->transfer = pch_spi_transfer;
		master->mode_bits = SPI_CPOL \| SPI_CPHA \| SPI_LSB_FIRST;

		data->board_dat = board_dat;
		data->plat_dev = plat_dev;