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Commit f1a9ffed authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Support QDSS_STM based on QCOM_KGSL_QDSS_STM config"

parents 9afb01b5 83100648

drivers/gpu/msm/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -70,3 +70,11 @@ config QCOM_KGSL_CONTEXT_DEBUG 
	  When enabled, total number of KGSL contexts, number of attached and

	  detached contexts are dumped into kernel log for all the processes.

	  This gives insight about the number of contexts held by each process.



config QCOM_KGSL_QDSS_STM

	bool "Enable support for QDSS STM for Adreno GPU"

	depends on QCOM_KGSL && CORESIGHT

	help

	 When enabled, the Adreno GPU QDSS STM support is enabled. GPU QDSS STM

	 memory will be mapped to GPU and QDSS clock needed to access this memory

	 is voted. Debug kernels should say 'Y' here.

drivers/gpu/msm/adreno_a6xx_gmu.c

+2 −2
Original line number Diff line number Diff line
@@ -2664,11 +2664,11 @@ int a6xx_gmu_probe(struct kgsl_device *device, 
		return ret;

	/*

	 * Voting for apb_pclk will enable power and clocks required for

	 * QDSS path to function. However, if CORESIGHT is not enabled,

	 * QDSS path to function. However, if QCOM_KGSL_QDSS_STM is not enabled,

	 * QDSS is essentially unusable. Hence, if QDSS cannot be used,

	 * don't vote for this clock.

	 */

	if (!IS_ENABLED(CONFIG_CORESIGHT)) {

	if (!IS_ENABLED(CONFIG_QCOM_KGSL_QDSS_STM)) {

		for (i = 0; i < ret; i++) {

			if (!strcmp(gmu->clks[i].id, "apb_pclk")) {

				gmu->clks[i].clk = NULL;

drivers/gpu/msm/adreno_a6xx_rgmu.c

+2 −2
Original line number Diff line number Diff line
@@ -1258,11 +1258,11 @@ static int a6xx_rgmu_clocks_probe(struct a6xx_rgmu_device *rgmu, 
		return ret;

	/*

	 * Voting for apb_pclk will enable power and clocks required for

	 * QDSS path to function. However, if CORESIGHT is not enabled,

	 * QDSS path to function. However, if QCOM_KGSL_QDSS_STM is not enabled,

	 * QDSS is essentially unusable. Hence, if QDSS cannot be used,

	 * don't vote for this clock.

	 */

	if (!IS_ENABLED(CONFIG_CORESIGHT)) {

	if (!IS_ENABLED(CONFIG_QCOM_KGSL_QDSS_STM)) {

		for (i = 0; i < ret; i++) {

			if (!strcmp(rgmu->clks[i].id, "apb_pclk")) {

				rgmu->clks[i].clk = NULL;

drivers/gpu/msm/kgsl_iommu.c

+2 −2
Original line number Diff line number Diff line
@@ -2511,8 +2511,8 @@ int kgsl_iommu_probe(struct kgsl_device *device) 
	 */

	kgsl_iommu_map_globals(mmu, mmu->defaultpagetable);

	kgsl_iommu_map_globals(mmu, mmu->lpac_pagetable);

	/* QDSS is supported only when CORESIGHT is enabled */

	if (IS_ENABLED(CONFIG_CORESIGHT))

	/* QDSS is supported only when QCOM_KGSL_QDSS_STM is enabled */

	if (IS_ENABLED(CONFIG_QCOM_KGSL_QDSS_STM))

		device->qdss_desc = kgsl_allocate_global_fixed(device,

					"qcom,gpu-qdss-stm", "gpu-qdss");

drivers/gpu/msm/kgsl_pwrctrl.c

+2 −2
Original line number Diff line number Diff line
@@ -1427,8 +1427,8 @@ static int _get_clocks(struct kgsl_device *device) 
		for (i = 0; i < KGSL_MAX_CLKS; i++) {

			if (pwr->grp_clks[i] || strcmp(clocks[i], name))

				continue;

			/* apb_pclk should only be enabled if CORESIGHT is enabled */

			if (!strcmp(name, "apb_pclk") && !IS_ENABLED(CONFIG_CORESIGHT))

			/* apb_pclk should only be enabled if QCOM_KGSL_QDSS_STM is enabled */

			if (!strcmp(name, "apb_pclk") && !IS_ENABLED(CONFIG_QCOM_KGSL_QDSS_STM))

				continue;



			pwr->grp_clks[i] = devm_clk_get(dev, name);