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Commit f17ccd11 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'socfpga_dts_for_v4.10_part_2' of... 

Merge tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS update for v4.10, part 2
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5

* tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux

:
  ARM: dts: socfpga: add nand controller nodes
  ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
  ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
  ARM: dts: socfpga: Enable QSPI in Arria10 devkit
  ARM: dts: socfpga: Add QSPI node for the Arria10
  ARM: dts: socfpga: enable qspi on the Cyclone5 devkit
  ARM: dts: socfpga: add specific compatible strings for boards

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a4a1fb15 d837a80d

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ 
	sh73a0-kzm9g.dtb

dtb-$(CONFIG_ARCH_SOCFPGA) += \

	socfpga_arria5_socdk.dtb \

	socfpga_arria10_socdk_qspi.dtb \

	socfpga_arria10_socdk_sdmmc.dtb \

	socfpga_cyclone5_mcvevk.dtb \

	socfpga_cyclone5_socdk.dtb \

arch/arm/boot/dts/socfpga.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -701,6 +701,19 @@ 
			status = "disabled";

		};



		nand0: nand@ff900000 {

			#address-cells = <0x1>;

			#size-cells = <0x1>;

			compatible = "denali,denali-nand-dt";

			reg = <0xff900000 0x100000>,

			      <0xffb80000 0x10000>;

			reg-names = "nand_data", "denali_reg";

			interrupts = <0x0 0x90 0x4>;

			dma-mask = <0xffffffff>;

			clocks = <&nand_clk>;

			status = "disabled";

		};



		ocram: sram@ffff0000 {

			compatible = "mmio-sram";

			reg = <0xffff0000 0x10000>;

arch/arm/boot/dts/socfpga_arria10.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -675,6 +675,20 @@ 
			};

		};



		qspi: spi@ff809000 {

			compatible = "cdns,qspi-nor";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0xff809000 0x100>,

			      <0xffa00000 0x100000>;

			interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;

			cdns,fifo-depth = <128>;

			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x00000000>;

			clocks = <&qspi_clk>;

			status = "disabled";

		};



		rst: rstmgr@ffd05000 {

			#reset-cells = <1>;

			compatible = "altr,rst-mgr";

arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts

0 → 100644
+49 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2016 Intel. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 */



/dts-v1/;

#include "socfpga_arria10_socdk.dtsi"



&qspi {

	status = "okay";



	flash0: n25q00@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "n25q00aa";

		reg = <0>;

		spi-max-frequency = <100000000>;



		m25p,fast-read;

		cdns,page-size = <256>;

		cdns,block-size = <16>;

		cdns,read-delay = <4>;

		cdns,tshsl-ns = <50>;

		cdns,tsd2d-ns = <50>;

		cdns,tchsh-ns = <4>;

		cdns,tslch-ns = <4>;



		partition@qspi-boot {

			label = "Boot and fpga data";

			reg = <0x0 0x2720000>;

		};



		partition@qspi-rootfs {

			label = "Root Filesystem - JFFS2";

			reg = <0x2720000 0x58E0000>;

		};

	};

};

arch/arm/boot/dts/socfpga_arria5_socdk.dts

+33 −0
Original line number Diff line number Diff line
@@ -82,6 +82,39 @@ 
	status = "okay";

};



&qspi {

	status = "okay";



	flash: flash@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "n25q256a";

		reg = <0>;

		spi-max-frequency = <100000000>;



		m25p,fast-read;

		cdns,page-size = <256>;

		cdns,block-size = <16>;

		cdns,read-delay = <4>;

		cdns,tshsl-ns = <50>;

		cdns,tsd2d-ns = <50>;

		cdns,tchsh-ns = <4>;

		cdns,tslch-ns = <4>;



		partition@qspi-boot {

			/* 8MB for raw data. */

			label = "Flash 0 Raw Data";

			reg = <0x0 0x800000>;

		};



		partition@qspi-rootfs {

			/* 120MB for jffs2 data. */

			label = "Flash 0 jffs2 Filesystem";

			reg = <0x800000 0x7800000>;

		};

	};

};



&usb1 {

	status = "okay";

};