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Commit efdaf275 authored by Chunyan Zhang's avatar Chunyan Zhang Committed by Ulf Hansson
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mmc: sdhci-sprd: fixed incorrect clock divider 



The register SDHCI_CLOCK_CONTROL should be cleared before config clock
divider, otherwise the frequency configured maybe lower than we
expected.

Fixes: fb8bd90f ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller")
Signed-off-by: default avatarChunyan Zhang <chunyan.zhang@unisoc.com>
Signed-off-by: default avatarChunyan Zhang <zhang.lyra@gmail.com>
Reviewed-by: default avatarBaolin Wang <baolin.wang@linaro.org>
Tested-by: default avatarBaolin Wang <baolin.wang@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 72741084

drivers/mmc/host/sdhci-sprd.c

+4 −3
Original line number Diff line number Diff line
@@ -217,10 +217,11 @@ static inline void _sdhci_sprd_set_clock(struct sdhci_host *host, 
	struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);

	u32 div, val, mask;



	div = sdhci_sprd_calc_div(sprd_host->base_rate, clk);

	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);



	clk |= ((div & 0x300) >> 2) | ((div & 0xFF) << 8);

	sdhci_enable_clk(host, clk);

	div = sdhci_sprd_calc_div(sprd_host->base_rate, clk);

	div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8);

	sdhci_enable_clk(host, div);



	/* enable auto gate sdhc_enable_auto_gate */

	val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);