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Commit ef9a61be authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-20130909' of git://git.infradead.org/linux-mtd 

Pull mtd updates from David Woodhouse:
 - factor out common code from MTD tests
 - nand-gpio cleanup and portability to non-ARM
 - m25p80 support for 4-byte addressing chips, other new chips
 - pxa3xx cleanup and support for new platforms
 - remove obsolete alauda, octagon-5066 drivers
 - erase/write support for bcm47xxsflash
 - improve detection of ECC requirements for NAND, controller setup
 - NFC acceleration support for atmel-nand, read/write via SRAM
 - etc

* tag 'for-linus-20130909' of git://git.infradead.org/linux-mtd: (184 commits)
  mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
  mtd: ofpart: use for_each_child_of_node() macro
  mtd: mtdswap: replace strict_strtoul() with kstrtoul()
  mtd cs553x_nand: use kzalloc() instead of memset
  mtd: atmel_nand: fix error return code in atmel_nand_probe()
  mtd: bcm47xxsflash: writing support
  mtd: bcm47xxsflash: implement erasing support
  mtd: bcm47xxsflash: convert to module_platform_driver instead of init/exit
  mtd: bcm47xxsflash: convert kzalloc to avoid invalid access
  mtd: remove alauda driver
  mtd: nand: mxc_nand: mark 'const' properly
  mtd: maps: cfi_flagadm: add missing __iomem annotation
  mtd: spear_smi: add missing __iomem annotation
  mtd: r852: Staticize local symbols
  mtd: nandsim: Staticize local symbols
  mtd: impa7: add missing __iomem annotation
  mtd: sm_ftl: Staticize local symbols
  mtd: m25p80: add support for mr25h10
  mtd: m25p80: make CONFIG_M25PXX_USE_FAST_READ safe to enable
  mtd: m25p80: Pass flags through CAT25_INFO macro
  ...
parents b5f0998c 6c3b8897

Documentation/ABI/testing/sysfs-class-mtd

+14 −3
Original line number Diff line number Diff line
@@ -128,9 +128,8 @@ KernelVersion: 3.4 
Contact:	linux-mtd@lists.infradead.org

Description:

		Maximum number of bit errors that the device is capable of

		correcting within each region covering an ecc step.  This will

		always be a non-negative integer.  Note that some devices will

		have multiple ecc steps within each writesize region.

		correcting within each region covering an ECC step (see

		ecc_step_size).  This will always be a non-negative integer.



		In the case of devices lacking any ECC capability, it is 0.
@@ -173,3 +172,15 @@ Description: 
		This is generally applicable only to NAND flash devices with ECC

		capability.  It is ignored on devices lacking ECC capability;

		i.e., devices for which ecc_strength is zero.



What:		/sys/class/mtd/mtdX/ecc_step_size

Date:		May 2013

KernelVersion:	3.10

Contact:	linux-mtd@lists.infradead.org

Description:

		The size of a single region covered by ECC, known as the ECC

		step.  Devices may have several equally sized ECC steps within

		each writesize region.



		It will always be a non-negative integer.  In the case of

		devices lacking any ECC capability, it is 0.

Documentation/DocBook/mtdnand.tmpl

+0 −2
Original line number Diff line number Diff line
@@ -1224,8 +1224,6 @@ in this page</entry> 
#define NAND_BBT_CREATE		0x00000200

/* Search good / bad pattern through all pages of a block */

#define NAND_BBT_SCANALLPAGES	0x00000400

/* Scan block empty during good / bad block scan */

#define NAND_BBT_SCANEMPTY	0x00000800

/* Write bbt if neccecary */

#define NAND_BBT_WRITE		0x00001000

/* Read and write back block contents when writing bbt */

Documentation/devicetree/bindings/mtd/atmel-nand.txt

+28 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required properties: 
  optional gpio and may be set to 0 if not present.



Optional properties:

- atmel,nand-has-dma : boolean to support dma transfer for nand read/write.

- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.

  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",

  "soft_bch".
@@ -29,6 +30,14 @@ Optional properties: 
  sector size 1024.

- nand-bus-width : 8 or 16 bus width if not present 8

- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

- Nand Flash Controller(NFC) is a slave driver under Atmel nand flash

  - Required properties:

    - compatible : "atmel,sama5d3-nfc".

    - reg : should specify the address and size used for NFC command registers,

            NFC registers and NFC Sram. NFC Sram address and size can be absent

            if don't want to use it.

  - Optional properties:

    - atmel,write-by-sram: boolean to enable NFC write by sram.



Examples:

nand0: nand@40000000,0 {
@@ -77,3 +86,22 @@ nand0: nand@40000000 { 
		...

	};

};



/* for NFC supported chips */

nand0: nand@40000000 {

	compatible = "atmel,at91rm9200-nand";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges;

        ...

        nfc@70000000 {

		compatible = "atmel,sama5d3-nfc";

		#address-cells = <1>;

		#size-cells = <1>;

		reg = <

			0x70000000 0x10000000	/* NFC Command Registers */

			0xffffc000 0x00000070	/* NFC HSMC regs */

			0x00200000 0x00100000	/* NFC SRAM banks */

		>;

	};

};

Documentation/devicetree/bindings/mtd/fsmc-nand.txt

+24 −1
Original line number Diff line number Diff line 
* FSMC NAND

ST Microelectronics Flexible Static Memory Controller (FSMC)

NAND Interface



Required properties:

- compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
@@ -9,6 +10,26 @@ Optional properties: 
- bank-width : Width (in bytes) of the device.  If not present, the width

  defaults to 1 byte

- nand-skip-bbtscan: Indicates the the BBT scanning should be skipped

- timings: array of 6 bytes for NAND timings. The meanings of these bytes

  are:

  byte 0 TCLR  : CLE to RE delay in number of AHB clock cycles, only 4 bits

                 are valid. Zero means one clockcycle, 15 means 16 clock

                 cycles.

  byte 1 TAR   : ALE to RE delay, 4 bits are valid. Same format as TCLR.

  byte 2 THIZ  : number of HCLK clock cycles during which the data bus is

                 kept in Hi-Z (tristate) after the start of a write access.

                 Only valid for write transactions. Zero means zero cycles,

                 255 means 255 cycles.

  byte 3 THOLD : number of HCLK clock cycles to hold the address (and data

                 when writing) after the command deassertation. Zero means

                 one cycle, 255 means 256 cycles.

  byte 4 TWAIT : number of HCLK clock cycles to assert the command to the

                 NAND flash in response to SMWAITn. Zero means 1 cycle,

                 255 means 256 cycles.

  byte 5 TSET  : number of HCLK clock cycles to assert the address before the

                 command is asserted. Zero means one cycle, 255 means 256

                 cycles.

- bank: default NAND bank to use (0-3 are valid, 0 is the default).



Example:
@@ -24,6 +45,8 @@ Example: 


		bank-width = <1>;

		nand-skip-bbtscan;

		timings = /bits/ 8 <0 0 0 2 3 0>;

		bank = <1>;



		partition@0 {

			...

Documentation/devicetree/bindings/mtd/partition.txt

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ Partitions can be represented by sub-nodes of an mtd device. This can be used 
on platforms which have strong conventions about which portions of a flash are

used for what purposes, but which don't use an on-flash partition table such

as RedBoot.

NOTE: if the sub-node has a compatible string, then it is not a partition.



#address-cells & #size-cells must both be present in the mtd device. There are

two valid values for both: