Loading msm/sde/sde_hw_catalog.c +8 −0 Original line number Diff line number Diff line Loading @@ -173,6 +173,7 @@ enum sde_prop { SDE_LEN, SSPP_LINEWIDTH, VIG_SSPP_LINEWIDTH, SCALING_LINEWIDTH, MIXER_LINEWIDTH, MIXER_BLEND, WB_LINEWIDTH, Loading Loading @@ -532,6 +533,7 @@ static struct sde_prop_type sde_prop[] = { {SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32}, {SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32}, {VIG_SSPP_LINEWIDTH, "qcom,sde-vig-sspp-linewidth", false, PROP_TYPE_U32}, {SCALING_LINEWIDTH, "qcom,sde-scaling-linewidth", false, PROP_TYPE_U32}, {MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32}, {MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32}, {WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32}, Loading Loading @@ -1412,6 +1414,7 @@ static int _sde_sspp_setup_vigs(struct device_node *np, continue; sblk->maxlinewidth = sde_cfg->vig_sspp_linewidth; sblk->scaling_linewidth = sde_cfg->scaling_linewidth; sblk->maxupscale = MAX_UPSCALE_RATIO; sblk->maxdwnscale = MAX_DOWNSCALE_RATIO; sspp->id = SSPP_VIG0 + vig_count; Loading Loading @@ -3599,6 +3602,11 @@ static int _sde_parse_prop_check(struct sde_mdss_cfg *cfg, if (!prop_exists[VIG_SSPP_LINEWIDTH]) cfg->vig_sspp_linewidth = cfg->max_sspp_linewidth; cfg->scaling_linewidth = PROP_VALUE_ACCESS(prop_value, SCALING_LINEWIDTH, 0); if (!prop_exists[SCALING_LINEWIDTH]) cfg->scaling_linewidth = cfg->vig_sspp_linewidth; cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value, MIXER_LINEWIDTH, 0); if (!prop_exists[MIXER_LINEWIDTH]) Loading msm/sde/sde_hw_catalog.h +5 −0 Original line number Diff line number Diff line Loading @@ -649,6 +649,8 @@ enum sde_qos_lut_usage { /** * struct sde_sspp_sub_blks : SSPP sub-blocks * @maxlinewidth: max source pipe line width support * @scaling_linewidth: max vig source pipe linewidth for scaling usecases * @maxdwnscale: max downscale ratio supported(without DECIMATION) * @maxupscale: maxupscale ratio supported * @maxwidth: max pixelwidth supported by this pipe Loading Loading @@ -690,6 +692,7 @@ enum sde_qos_lut_usage { */ struct sde_sspp_sub_blks { u32 maxlinewidth; u32 scaling_linewidth; u32 creq_vblank; u32 danger_vblank; u32 pixel_ram_size; Loading Loading @@ -1378,6 +1381,7 @@ struct sde_limit_cfg { * * @max_sspp_linewidth max source pipe line width support. * @vig_sspp_linewidth max vig source pipe line width support. * @scaling_linewidth max vig source pipe linewidth for scaling usecases * @max_mixer_width max layer mixer line width support. * @max_mixer_blendstages max layer mixer blend stages or * supported z order Loading Loading @@ -1447,6 +1451,7 @@ struct sde_mdss_cfg { u32 max_sspp_linewidth; u32 vig_sspp_linewidth; u32 scaling_linewidth; u32 max_mixer_width; u32 max_mixer_blendstages; u32 max_wb_linewidth; Loading msm/sde/sde_plane.c +11 −5 Original line number Diff line number Diff line Loading @@ -2414,6 +2414,12 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, } sblk = psde->pipe_sblk; max_upscale = sblk->maxupscale; if (inline_rotation) max_linewidth = sblk->in_rot_maxheight; else if (scaler_src_w != state->crtc_w || scaler_src_h != state->crtc_h) max_linewidth = sblk->scaling_linewidth; else max_linewidth = sblk->maxlinewidth; crtc = state->crtc; Loading Loading @@ -2443,11 +2449,11 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, src->w, src->h, dst->w, dst->h); ret = -EINVAL; /* check decimated source width */ } else if (src_deci_w > max_linewidth) { /* check scaler source width */ } else if (scaler_src_w > max_linewidth) { SDE_ERROR_PLANE(psde, "invalid src w:%u, deci w:%u, line w:%u\n", src->w, src_deci_w, max_linewidth); "invalid src w:%u, scaler w:%u, line w:%u, rot: %d\n", src->w, scaler_src_w, max_linewidth, inline_rotation); ret = -E2BIG; /* check max scaler capability */ Loading Loading
msm/sde/sde_hw_catalog.c +8 −0 Original line number Diff line number Diff line Loading @@ -173,6 +173,7 @@ enum sde_prop { SDE_LEN, SSPP_LINEWIDTH, VIG_SSPP_LINEWIDTH, SCALING_LINEWIDTH, MIXER_LINEWIDTH, MIXER_BLEND, WB_LINEWIDTH, Loading Loading @@ -532,6 +533,7 @@ static struct sde_prop_type sde_prop[] = { {SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32}, {SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32}, {VIG_SSPP_LINEWIDTH, "qcom,sde-vig-sspp-linewidth", false, PROP_TYPE_U32}, {SCALING_LINEWIDTH, "qcom,sde-scaling-linewidth", false, PROP_TYPE_U32}, {MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32}, {MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32}, {WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32}, Loading Loading @@ -1412,6 +1414,7 @@ static int _sde_sspp_setup_vigs(struct device_node *np, continue; sblk->maxlinewidth = sde_cfg->vig_sspp_linewidth; sblk->scaling_linewidth = sde_cfg->scaling_linewidth; sblk->maxupscale = MAX_UPSCALE_RATIO; sblk->maxdwnscale = MAX_DOWNSCALE_RATIO; sspp->id = SSPP_VIG0 + vig_count; Loading Loading @@ -3599,6 +3602,11 @@ static int _sde_parse_prop_check(struct sde_mdss_cfg *cfg, if (!prop_exists[VIG_SSPP_LINEWIDTH]) cfg->vig_sspp_linewidth = cfg->max_sspp_linewidth; cfg->scaling_linewidth = PROP_VALUE_ACCESS(prop_value, SCALING_LINEWIDTH, 0); if (!prop_exists[SCALING_LINEWIDTH]) cfg->scaling_linewidth = cfg->vig_sspp_linewidth; cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value, MIXER_LINEWIDTH, 0); if (!prop_exists[MIXER_LINEWIDTH]) Loading
msm/sde/sde_hw_catalog.h +5 −0 Original line number Diff line number Diff line Loading @@ -649,6 +649,8 @@ enum sde_qos_lut_usage { /** * struct sde_sspp_sub_blks : SSPP sub-blocks * @maxlinewidth: max source pipe line width support * @scaling_linewidth: max vig source pipe linewidth for scaling usecases * @maxdwnscale: max downscale ratio supported(without DECIMATION) * @maxupscale: maxupscale ratio supported * @maxwidth: max pixelwidth supported by this pipe Loading Loading @@ -690,6 +692,7 @@ enum sde_qos_lut_usage { */ struct sde_sspp_sub_blks { u32 maxlinewidth; u32 scaling_linewidth; u32 creq_vblank; u32 danger_vblank; u32 pixel_ram_size; Loading Loading @@ -1378,6 +1381,7 @@ struct sde_limit_cfg { * * @max_sspp_linewidth max source pipe line width support. * @vig_sspp_linewidth max vig source pipe line width support. * @scaling_linewidth max vig source pipe linewidth for scaling usecases * @max_mixer_width max layer mixer line width support. * @max_mixer_blendstages max layer mixer blend stages or * supported z order Loading Loading @@ -1447,6 +1451,7 @@ struct sde_mdss_cfg { u32 max_sspp_linewidth; u32 vig_sspp_linewidth; u32 scaling_linewidth; u32 max_mixer_width; u32 max_mixer_blendstages; u32 max_wb_linewidth; Loading
msm/sde/sde_plane.c +11 −5 Original line number Diff line number Diff line Loading @@ -2414,6 +2414,12 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, } sblk = psde->pipe_sblk; max_upscale = sblk->maxupscale; if (inline_rotation) max_linewidth = sblk->in_rot_maxheight; else if (scaler_src_w != state->crtc_w || scaler_src_h != state->crtc_h) max_linewidth = sblk->scaling_linewidth; else max_linewidth = sblk->maxlinewidth; crtc = state->crtc; Loading Loading @@ -2443,11 +2449,11 @@ static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state, src->w, src->h, dst->w, dst->h); ret = -EINVAL; /* check decimated source width */ } else if (src_deci_w > max_linewidth) { /* check scaler source width */ } else if (scaler_src_w > max_linewidth) { SDE_ERROR_PLANE(psde, "invalid src w:%u, deci w:%u, line w:%u\n", src->w, src_deci_w, max_linewidth); "invalid src w:%u, scaler w:%u, line w:%u, rot: %d\n", src->w, scaler_src_w, max_linewidth, inline_rotation); ret = -E2BIG; /* check max scaler capability */ Loading