Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eeea8147 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Vinod Koul
Browse files

dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC



The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4,
Pro4, and sLD8 SoCs.

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 65102238
Loading
Loading
Loading
Loading
+25 −0
Original line number Diff line number Diff line
UniPhier Media IO DMA controller

This works as an external DMA engine for SD/eMMC controllers etc.
found in UniPhier LD4, Pro4, sLD8 SoCs.

Required properties:
- compatible: should be "socionext,uniphier-mio-dmac".
- reg: offset and length of the register set for the device.
- interrupts: a list of interrupt specifiers associated with the DMA channels.
- clocks: a single clock specifier.
- #dma-cells: should be <1>. The single cell represents the channel index.

Example:
	dmac: dma-controller@5a000000 {
		compatible = "socionext,uniphier-mio-dmac";
		reg = <0x5a000000 0x1000>;
		interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
			     <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
		clocks = <&mio_clk 7>;
		#dma-cells = <1>;
	};

Note:
In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo.
The first two channels share a single interrupt line.