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Commit eed05c85 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-small-cleanup' 



Jiri Pirko says:

====================
mlxsw: small cleanup

Couple of small cleanup patches from Nogah.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 035226b9 3e8c1fd3

drivers/net/ethernet/mellanox/mlxsw/reg.h

+42 −30
Original line number Diff line number Diff line
@@ -3123,6 +3123,7 @@ static inline void mlxsw_reg_pfcc_pack(char *payload, u8 local_port) 
 */

#define MLXSW_REG_PPCNT_ID 0x5008

#define MLXSW_REG_PPCNT_LEN 0x100

#define MLXSW_REG_PPCNT_COUNTERS_OFFSET 0x08



MLXSW_REG_DEFINE(ppcnt, MLXSW_REG_PPCNT_ID, MLXSW_REG_PPCNT_LEN);
@@ -3200,162 +3201,171 @@ MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5); 
 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_frames_transmitted_ok,

	     0x08 + 0x00, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);



/* reg_ppcnt_a_frames_received_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_frames_received_ok,

	     0x08 + 0x08, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x08, 0, 64);



/* reg_ppcnt_a_frame_check_sequence_errors

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_frame_check_sequence_errors,

	     0x08 + 0x10, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x10, 0, 64);



/* reg_ppcnt_a_alignment_errors

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_alignment_errors,

	     0x08 + 0x18, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x18, 0, 64);



/* reg_ppcnt_a_octets_transmitted_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_octets_transmitted_ok,

	     0x08 + 0x20, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x20, 0, 64);



/* reg_ppcnt_a_octets_received_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_octets_received_ok,

	     0x08 + 0x28, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x28, 0, 64);



/* reg_ppcnt_a_multicast_frames_xmitted_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_xmitted_ok,

	     0x08 + 0x30, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x30, 0, 64);



/* reg_ppcnt_a_broadcast_frames_xmitted_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_xmitted_ok,

	     0x08 + 0x38, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x38, 0, 64);



/* reg_ppcnt_a_multicast_frames_received_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_received_ok,

	     0x08 + 0x40, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x40, 0, 64);



/* reg_ppcnt_a_broadcast_frames_received_ok

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_received_ok,

	     0x08 + 0x48, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x48, 0, 64);



/* reg_ppcnt_a_in_range_length_errors

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_in_range_length_errors,

	     0x08 + 0x50, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x50, 0, 64);



/* reg_ppcnt_a_out_of_range_length_field

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_out_of_range_length_field,

	     0x08 + 0x58, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x58, 0, 64);



/* reg_ppcnt_a_frame_too_long_errors

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_frame_too_long_errors,

	     0x08 + 0x60, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x60, 0, 64);



/* reg_ppcnt_a_symbol_error_during_carrier

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_symbol_error_during_carrier,

	     0x08 + 0x68, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x68, 0, 64);



/* reg_ppcnt_a_mac_control_frames_transmitted

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_transmitted,

	     0x08 + 0x70, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x70, 0, 64);



/* reg_ppcnt_a_mac_control_frames_received

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_received,

	     0x08 + 0x78, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x78, 0, 64);



/* reg_ppcnt_a_unsupported_opcodes_received

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_unsupported_opcodes_received,

	     0x08 + 0x80, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x80, 0, 64);



/* reg_ppcnt_a_pause_mac_ctrl_frames_received

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_received,

	     0x08 + 0x88, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x88, 0, 64);



/* reg_ppcnt_a_pause_mac_ctrl_frames_transmitted

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_transmitted,

	     0x08 + 0x90, 0, 64);

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x90, 0, 64);



/* Ethernet Per Priority Group Counters */



/* reg_ppcnt_rx_octets

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, rx_octets, 0x08 + 0x00, 0, 64);

MLXSW_ITEM64(reg, ppcnt, rx_octets,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);



/* reg_ppcnt_rx_frames

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, rx_frames, 0x08 + 0x20, 0, 64);

MLXSW_ITEM64(reg, ppcnt, rx_frames,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x20, 0, 64);



/* reg_ppcnt_tx_octets

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tx_octets, 0x08 + 0x28, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tx_octets,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x28, 0, 64);



/* reg_ppcnt_tx_frames

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tx_frames, 0x08 + 0x48, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tx_frames,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x48, 0, 64);



/* reg_ppcnt_rx_pause

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, rx_pause, 0x08 + 0x50, 0, 64);

MLXSW_ITEM64(reg, ppcnt, rx_pause,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x50, 0, 64);



/* reg_ppcnt_rx_pause_duration

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, rx_pause_duration, 0x08 + 0x58, 0, 64);

MLXSW_ITEM64(reg, ppcnt, rx_pause_duration,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x58, 0, 64);



/* reg_ppcnt_tx_pause

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tx_pause, 0x08 + 0x60, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tx_pause,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x60, 0, 64);



/* reg_ppcnt_tx_pause_duration

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tx_pause_duration, 0x08 + 0x68, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tx_pause_duration,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x68, 0, 64);



/* reg_ppcnt_rx_pause_transition

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tx_pause_transition, 0x08 + 0x70, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tx_pause_transition,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x70, 0, 64);



/* Ethernet Per Traffic Group Counters */
@@ -3365,14 +3375,16 @@ MLXSW_ITEM64(reg, ppcnt, tx_pause_transition, 0x08 + 0x70, 0, 64); 
 * The field cannot be cleared.

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tc_transmit_queue, 0x08 + 0x00, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tc_transmit_queue,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);



/* reg_ppcnt_tc_no_buffer_discard_uc

 * The number of unicast packets dropped due to lack of shared

 * buffer resources.

 * Access: RO

 */

MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc, 0x08 + 0x08, 0, 64);

MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc,

	     MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x08, 0, 64);



static inline void mlxsw_reg_ppcnt_pack(char *payload, u8 local_port,

					enum mlxsw_reg_ppcnt_grp grp,

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+7 −17
Original line number Diff line number Diff line
@@ -1328,16 +1328,16 @@ static void update_stats_cache(struct work_struct *work) 
{

	struct mlxsw_sp_port *mlxsw_sp_port =

		container_of(work, struct mlxsw_sp_port,

			     hw_stats.update_dw.work);

			     periodic_hw_stats.update_dw.work);



	if (!netif_carrier_ok(mlxsw_sp_port->dev))

		goto out;



	mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,

				   mlxsw_sp_port->hw_stats.cache);

				   &mlxsw_sp_port->periodic_hw_stats.stats);



out:

	mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,

	mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw,

			       MLXSW_HW_STATS_UPDATE_TIME);

}
@@ -1350,7 +1350,7 @@ mlxsw_sp_port_get_stats64(struct net_device *dev, 
{

	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);



	memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));

	memcpy(stats, &mlxsw_sp_port->periodic_hw_stats.stats, sizeof(*stats));

}



static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
@@ -2905,14 +2905,7 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, 
		goto err_alloc_sample;

	}



	mlxsw_sp_port->hw_stats.cache =

		kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);



	if (!mlxsw_sp_port->hw_stats.cache) {

		err = -ENOMEM;

		goto err_alloc_hw_stats;

	}

	INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,

	INIT_DELAYED_WORK(&mlxsw_sp_port->periodic_hw_stats.update_dw,

			  &update_stats_cache);



	dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
@@ -3026,7 +3019,7 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, 
	mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,

				mlxsw_sp_port, dev, mlxsw_sp_port->split,

				module);

	mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);

	mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw, 0);

	return 0;



err_register_netdev:
@@ -3049,8 +3042,6 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, 
err_port_swid_set:

	mlxsw_sp_port_module_unmap(mlxsw_sp_port);

err_port_module_map:

	kfree(mlxsw_sp_port->hw_stats.cache);

err_alloc_hw_stats:

	kfree(mlxsw_sp_port->sample);

err_alloc_sample:

	free_percpu(mlxsw_sp_port->pcpu_stats);
@@ -3065,7 +3056,7 @@ static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port) 
{

	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];



	cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);

	cancel_delayed_work_sync(&mlxsw_sp_port->periodic_hw_stats.update_dw);

	mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);

	unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */

	mlxsw_sp->ports[local_port] = NULL;
@@ -3075,7 +3066,6 @@ static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port) 
	mlxsw_sp_port_dcb_fini(mlxsw_sp_port);

	mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);

	mlxsw_sp_port_module_unmap(mlxsw_sp_port);

	kfree(mlxsw_sp_port->hw_stats.cache);

	kfree(mlxsw_sp_port->sample);

	free_percpu(mlxsw_sp_port->pcpu_stats);

	WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vlans_list));

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+2 −2
Original line number Diff line number Diff line
@@ -231,9 +231,9 @@ struct mlxsw_sp_port { 
	struct list_head mall_tc_list;

	struct {

		#define MLXSW_HW_STATS_UPDATE_TIME HZ

		struct rtnl_link_stats64 *cache;

		struct rtnl_link_stats64 stats;

		struct delayed_work update_dw;

	} hw_stats;

	} periodic_hw_stats;

	struct mlxsw_sp_port_sample *sample;

	struct list_head vlans_list;

};