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Commit eea11c51 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Revert "Revert "8250: add support for ASIX devices with a FIFO bug"" 



This reverts commit 0697a1a5 which is
commit a82d62f708545d22859584e0e0620da8e3759bbc upstream.

It changes the serial port ABI, which Android cares about.  As the issue
isn't really a problem at all for any Android devices, just revert it
keeping the fix present for now, to preserve the abi.

Bug: 161946584
Change-Id: Ie9b3f9aa8e705c63680fb9556e579e6241589d74
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parent 34df0a4c

drivers/tty/serial/8250/8250.h

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ struct serial8250_config { 
#define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */

#define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */

#define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */

#define UART_BUG_PARITY	(1 << 4)	/* UART mishandles parity if FIFO enabled */





#ifdef CONFIG_SERIAL_8250_SHARE_IRQ

drivers/tty/serial/8250/8250_pci.c

+19 −0
Original line number Diff line number Diff line
@@ -1068,6 +1068,14 @@ static int pci_oxsemi_tornado_init(struct pci_dev *dev) 
	return number_uarts;

}



static int pci_asix_setup(struct serial_private *priv,

		  const struct pciserial_board *board,

		  struct uart_8250_port *port, int idx)

{

	port->bugs |= UART_BUG_PARITY;

	return pci_default_setup(priv, board, port, idx);

}



/* Quatech devices have their own extra interface features */



struct quatech_feature {
@@ -1864,6 +1872,7 @@ pci_moxa_setup(struct serial_private *priv, 
#define PCI_DEVICE_ID_WCH_CH355_4S	0x7173

#define PCI_VENDOR_ID_AGESTAR		0x5372

#define PCI_DEVICE_ID_AGESTAR_9375	0x6872

#define PCI_VENDOR_ID_ASIX		0x9710

#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a

#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e
@@ -2662,6 +2671,16 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { 
		.subdevice      = PCI_ANY_ID,

		.setup          = pci_wch_ch38x_setup,

	},

	/*

	 * ASIX devices with FIFO bug

	 */

	{

		.vendor		= PCI_VENDOR_ID_ASIX,

		.device		= PCI_ANY_ID,

		.subvendor	= PCI_ANY_ID,

		.subdevice	= PCI_ANY_ID,

		.setup		= pci_asix_setup,

	},

	/*

	 * Broadcom TruManage (NetXtreme)

	 */

drivers/tty/serial/8250/8250_port.c

+8 −3
Original line number Diff line number Diff line
@@ -2535,8 +2535,11 @@ static unsigned char serial8250_compute_lcr(struct uart_8250_port *up, 


	if (c_cflag & CSTOPB)

		cval |= UART_LCR_STOP;

	if (c_cflag & PARENB)

	if (c_cflag & PARENB) {

		cval |= UART_LCR_PARITY;

		if (up->bugs & UART_BUG_PARITY)

			up->fifo_bug = true;

	}

	if (!(c_cflag & PARODD))

		cval |= UART_LCR_EPAR;

#ifdef CMSPAR
@@ -2643,7 +2646,8 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, 
	up->lcr = cval;					/* Save computed LCR */



	if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {

		if (baud < 2400 && !up->dma) {

		/* NOTE: If fifo_bug is not set, a user can set RX_trigger. */

		if ((baud < 2400 && !up->dma) || up->fifo_bug) {

			up->fcr &= ~UART_FCR_TRIGGER_MASK;

			up->fcr |= UART_FCR_TRIGGER_1;

		}
@@ -2979,7 +2983,8 @@ static int do_set_rxtrig(struct tty_port *port, unsigned char bytes) 
	struct uart_8250_port *up = up_to_u8250p(uport);

	int rxtrig;



	if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)

	if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||

	    up->fifo_bug)

		return -EINVAL;



	rxtrig = bytes_to_fcr_rxtrig(up, bytes);

include/linux/serial_8250.h

+1 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ struct uart_8250_port { 
	struct list_head	list;		/* ports on this IRQ */

	u32			capabilities;	/* port capabilities */

	unsigned short		bugs;		/* port bugs */

	bool			fifo_bug;	/* min RX trigger if enabled */

	unsigned int		tx_loadsz;	/* transmit fifo load size */

	unsigned char		acr;

	unsigned char		fcr;