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Commit ee94b90c authored by Jiong Wang's avatar Jiong Wang Committed by Alexei Starovoitov
Browse files

mips: bpf: implement jitting of BPF_ALU | BPF_ARSH | BPF_X 



Jitting of BPF_K is supported already, but not BPF_X. This patch complete
the support for the latter on both MIPS and microMIPS.

Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Acked-by: default avatarPaul Burton <paul.burton@mips.com>
Signed-off-by: default avatarJiong Wang <jiong.wang@netronome.com>
Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
parent 17f6c83f

arch/mips/include/asm/uasm.h

+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ Ip_u2u1s3(_slti); 
Ip_u2u1s3(_sltiu);

Ip_u3u1u2(_sltu);

Ip_u2u1u3(_sra);

Ip_u3u2u1(_srav);

Ip_u2u1u3(_srl);

Ip_u3u2u1(_srlv);

Ip_u3u1u2(_subu);

arch/mips/include/uapi/asm/inst.h

+1 −0
Original line number Diff line number Diff line
@@ -371,6 +371,7 @@ enum mm_32a_minor_op { 
	mm_srl32_op = 0x040,

	mm_srlv32_op = 0x050,

	mm_sra_op = 0x080,

	mm_srav_op = 0x090,

	mm_rotr_op = 0x0c0,

	mm_lwxs_op = 0x118,

	mm_addu32_op = 0x150,

arch/mips/mm/uasm-micromips.c

+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ static const struct insn insn_table_MM[insn_invalid] = { 
	[insn_sltiu]	= {M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},

	[insn_sltu]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD},

	[insn_sra]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD},

	[insn_srav]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_srav_op), RT | RS | RD},

	[insn_srl]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD},

	[insn_srlv]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD},

	[insn_rotr]	= {M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD},

arch/mips/mm/uasm-mips.c

+1 −0
Original line number Diff line number Diff line
@@ -171,6 +171,7 @@ static const struct insn insn_table[insn_invalid] = { 
	[insn_sltiu]	= {M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},

	[insn_sltu]	= {M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD},

	[insn_sra]	= {M(spec_op, 0, 0, 0, 0, sra_op),  RT | RD | RE},

	[insn_srav]	= {M(spec_op, 0, 0, 0, 0, srav_op), RS | RT | RD},

	[insn_srl]	= {M(spec_op, 0, 0, 0, 0, srl_op),  RT | RD | RE},

	[insn_srlv]	= {M(spec_op, 0, 0, 0, 0, srlv_op),  RS | RT | RD},

	[insn_subu]	= {M(spec_op, 0, 0, 0, 0, subu_op),	RS | RT | RD},

arch/mips/mm/uasm.c

+5 −4
Original line number Diff line number Diff line
@@ -61,10 +61,10 @@ enum opcode { 
	insn_mthc0, insn_mthi, insn_mtlo, insn_mul, insn_multu, insn_nor,

	insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sb,

	insn_sc, insn_scd, insn_sd, insn_sh, insn_sll, insn_sllv,

	insn_slt, insn_slti, insn_sltiu, insn_sltu, insn_sra, insn_srl,

	insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp,

	insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, insn_xor,

	insn_xori, insn_yield,

	insn_slt, insn_slti, insn_sltiu, insn_sltu, insn_sra, insn_srav,

	insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall,

	insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh,

	insn_xor, insn_xori, insn_yield,

	insn_invalid /* insn_invalid must be last */

};
@@ -353,6 +353,7 @@ I_u2u1s3(_slti) 
I_u2u1s3(_sltiu)

I_u3u1u2(_sltu)

I_u2u1u3(_sra)

I_u3u2u1(_srav)

I_u2u1u3(_srl)

I_u3u2u1(_srlv)

I_u2u1u3(_rotr)