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Commit ee435831 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Chris Wilson
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drm/i915/icl: account for context save/restore removed bits 

The RS_CTX_ENABLE and CTX_SAVE_INHIBIT bits are not present on ICL
anymore, but we still try to set them and then check them with
GEM_BUG_ON, resulting in a BUG() call. The bug can be reproduced by
igt/drv_selftest/live_hangcheck/others-priority and our CI was able
to catch it.

It is worth noticing that commit 05f0addd ("drm/i915/icl: Enhanced
execution list support") already tried to avoid the save bits
on ICL, but only inside populate_lr_context().

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Testcase: igt/drv_selftest/live_hangcheck/others-priority
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107399


References: 05f0addd ("drm/i915/icl: Enhanced execution list support")
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180809235852.24516-1-paulo.r.zanoni@intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 2ac45bdd

drivers/gpu/drm/i915/intel_lrc.c

+6 −8
Original line number Diff line number Diff line
@@ -541,11 +541,6 @@ static void inject_preempt_context(struct intel_engine_cs *engine) 


	GEM_BUG_ON(execlists->preempt_complete_status !=

		   upper_32_bits(ce->lrc_desc));

	GEM_BUG_ON((ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1] &

		    _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |

				       CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT)) !=

		   _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |

				      CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT));



	/*

	 * Switch to our empty preempt context so
@@ -2582,10 +2577,13 @@ static void execlists_init_reg_state(u32 *regs, 
				 MI_LRI_FORCE_POSTED;



	CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),

		_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |

				    CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |

				    CTX_CTRL_RS_CTX_ENABLE) |

		_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |

		_MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));

	if (INTEL_GEN(dev_priv) < 11) {

		regs[CTX_CONTEXT_CONTROL + 1] |=

			_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |

					    CTX_CTRL_RS_CTX_ENABLE);

	}

	CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);

	CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);

	CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);